Investigating the effects of doping gradient, trap charges, and temperature on Ge vertical TFET for low power switching and analog applications

VK Chappa, AK Yadav, A Deka, R Khosla - Materials Science and …, 2024 - Elsevier
Influence of Gaussian doping in transistor regions, doping gradient step size (σ), interface
trap charges (ITC), and temperature on DC, Analog, and Linearity performance of Ge …

Vertical cladding layer-based doping-less tunneling field effect transistor: a novel low-power high-performance device

IC Cherik, S Mohammadi - IEEE Transactions on Electron …, 2022 - ieeexplore.ieee.org
This article introduces a novel vertical doping-less tunnel field-effect transistor (TFET), in
which instead of using metal to induce charge plasma in the source region, cladding layer is …

Ge-source based L-shaped tunnel field effect transistor for low power switching application

S Chander, SK Sinha, R Chaudhary, A Singh - Silicon, 2021 - Springer
In this work, the performance of the heterojunction L-Tunnel Field Effect Transistor (LTFET)
has been analyzed with different engineering techniques such as bandgap engineering …

Exploring half-metallic Co-based full Heusler alloys using a DFT+ U method combined with linear response approach

K Nawa, Y Miura - RSC advances, 2019 - pubs.rsc.org
A density functional theory (DFT)+ U method based on linear response (LR) theory was
applied to investigate the electronic structures of a Co-based ternary full Heusler alloy …

Insights into the DC, RF/Analog and linearity performance of vertical tunneling based TFET for low-power applications

N Paras, SS Chauhan - Microelectronic Engineering, 2019 - Elsevier
The concept of dual metal and double gate in Vertical TFET is presented to show the
improvement of DC as well as analog/RF device performance standards due to enhanced …

Performance assessment of cavity on source dual material split gate GaAs/InAs/Ge junctionless TFET for label-free detection of biomolecules

Dharmender, K Nigam, S Kumar - Applied Physics A, 2022 - Springer
This article proposes and investigates a cavity on source dual-material split gate
GaAs/InAs/Ge Junctionless tunnel field-effect transistor (CS-DMSG-GaAs/InAs/Ge-JLTFET) …

A novel vertical tunneling based Ge-source TFET with enhanced DC and RF characteristics for prospect low power applications

N Paras, SS Chauhan - Microelectronic Engineering, 2019 - Elsevier
In this paper, we propose a novel germanium source based dual metal gate tunneling field
effect transistor (VGeDMG). Design of device effectively suppresses lateral tunneling current …

Impact of temperature and interface trapped charges variation on the Analog/RF and linearity of vertically extended drain double gate Si0. 5Ge0. 5 source tunnel FET

P Kumari, A Raj, KN Priyadarshani, S Singh - Microelectronics Journal, 2021 - Elsevier
This work analyses the reliability issues of vertically extended drain double gate Si 1− x Ge x
source tunnel FET on the basis of temperature effect and interface charge effects. The …

Temperature sensitivity analysis of dual material stack gate oxide source dielectric pocket TFET

K Nigam, S Kumar, Dharmender - Journal of Computational Electronics, 2022 - Springer
The variation of the temperature-dependent performance of an electronic device is one of
the major concerns in predicting the actual electrical characteristics of the device as the …

Design and performance analysis of symmetrical and asymmetrical triple gate dopingless vertical TFET for biorecognition

T Wadhera, G Wadhwa, TK Bhardwaj, D Kakkar, B Raj - Silicon, 2021 - Springer
The present paper proposes a dielectric modulation based Triple Gate Doping Less Tunnel
Field Effect Transistor (TG-DLTFET) biosensor with a cavity introduced underneath the gate …