A Low-Noise -Based Phase Interpolator in 16-nm CMOS
A Jakobsson, A Serban, S Gong - IEEE Transactions on …, 2018 - ieeexplore.ieee.org
This brief describes a passive analog phase interpolator, utilizing a switched RC-network.
The proposed circuit eliminates the current sources in a phase interpolator based on …
The proposed circuit eliminates the current sources in a phase interpolator based on …
Design of a Low-Power Phase Interpolator for Multi-Standard Transceiver PHYs
A Stefanou, E Bochoridis - 2019 8th International Conference …, 2019 - ieeexplore.ieee.org
This paper presents a 1V phase interpolator designed at TSMC 28nm, for high-speed serial
IOs. The interpolator uses the four quadrature clocks generated by a PLL in a half-rate …
IOs. The interpolator uses the four quadrature clocks generated by a PLL in a half-rate …
An energy-efficient low-voltage swing transceiver for mW-range IoT end-nodes
As the Internet-of-Things (IoT) applications become more and more pervasive, IoT end
nodes are requiring more and more computational power within a few mW of power …
nodes are requiring more and more computational power within a few mW of power …
A non-return-to-zero charge-steering flip-flop for high-speed wireline transceivers
KM Hassan, SA Ibrahim - 2019 IEEE Jordan International Joint …, 2019 - ieeexplore.ieee.org
In the recent decade, the demand for circuits that operate at high frequency with low energy
has increased. The demand is rushed by big-data and internet-of-things applications …
has increased. The demand is rushed by big-data and internet-of-things applications …
A 0.5 GHz 0.35 mW LDO-powered constant-slope phase interpolator with 0.22% INL
Clock generators are an essential and critical building block of any communication link,
whether it be wired or wireless, and they are increasingly critical given the push for lower I/O …
whether it be wired or wireless, and they are increasingly critical given the push for lower I/O …
Orthogonal phase mixing for improved linearity phase interpolator
T Sumesaglam - Electronics Letters, 2022 - Wiley Online Library
As the demand for high‐speed low‐power transceivers grows, it is critical to have precise
clock timing circuits such as phase interpolators (PI) that allow maximizing link margin. A …
clock timing circuits such as phase interpolators (PI) that allow maximizing link margin. A …
A low power charge steering based frequency divider
MS Eleraky, M El Nozahi… - 2020 37th National Radio …, 2020 - ieeexplore.ieee.org
This paper presents a low-power charge steering based frequency divider. This divider is
designed for wireless local area networks (WLAN) and the internet of things (IoT) …
designed for wireless local area networks (WLAN) and the internet of things (IoT) …
Implementation and Analysis of 8-bit Digital Phase Interpolator
H Lee, S Kim - 대한전자공학회학술대회, 2024 - dbpia.co.kr
Current-Mode Logic (CML) based Phase Interpolator (PI) is widely used for high-speed multi-
phase clock generation. A CML-based PI generally consists of a CMOS-to-CML converter, a …
phase clock generation. A CML-based PI generally consists of a CMOS-to-CML converter, a …