A review of new time-to-digital conversion techniques
Time-to-digital converters (TDCs) are vital components in time and distance measurement
and frequency-locking applications. There are many architectures for implementing TDCs …
and frequency-locking applications. There are many architectures for implementing TDCs …
[HTML][HTML] Time-to-digital conversion techniques: A survey of recent developments
J Szyduczyński, D Kościelnik, M Miśkowicz - Measurement, 2023 - Elsevier
Time-to-digital converters (TDCs) are key components of time-mode circuits and enablers for
digital processing of analog signals encoded in time. Since design of time-mode circuits …
digital processing of analog signals encoded in time. Since design of time-mode circuits …
CMOS imager with 1024 SPADs and TDCs for single-photon timing and 3-D time-of-flight
We present a CMOS imager consisting of 32× 32 smart pixels, each one able to detect
single photons in the 300-900 nm wavelength range and to perform both photon-counting …
single photons in the 300-900 nm wavelength range and to perform both photon-counting …
[图书][B] Time-to-digital converter basics
S Henzler, S Henzler - 2010 - Springer
On the basis of a generic mixed-signal system the scaling difficulties of analog and mixed-
signal circuits based on a signal representation in the voltage domain are discussed for …
signal circuits based on a signal representation in the voltage domain are discussed for …
A multi-path gated ring oscillator TDC with first-order noise shaping
MZ Straayer, MH Perrott - IEEE Journal of Solid-State Circuits, 2009 - ieeexplore.ieee.org
An 11-bit, 50-MS/s time-to-digital converter (TDC) using a multipath gated ring oscillator with
6 ps of effective delay per stage demonstrates 1st-order noise shaping. At frequencies below …
6 ps of effective delay per stage demonstrates 1st-order noise shaping. At frequencies below …
A 9 b, 1.25 ps resolution coarse–fine time-to-digital converter in 90 nm CMOS that amplifies a time residue
This paper presents the design of a coarse-fine time-to-digital converter (TDC) that amplifies
a time residue to improve time resolution, similar to a coarse-fine analog-to-digital converter …
a time residue to improve time resolution, similar to a coarse-fine analog-to-digital converter …
A Low-Noise Wide-BW 3.6-GHz Digital Fractional-N Frequency Synthesizer With a Noise-Shaping Time-to-Digital Converter and Quantization Noise Cancellation
CM Hsu, MZ Straayer, MH Perrott - IEEE Journal of Solid-State …, 2008 - ieeexplore.ieee.org
A 3.6-GHz digital fractional-N frequency synthesizer achieving low noise and 500-kHz
bandwidth is presented. This architecture uses a gated-ring-oscillator time-to-digital …
bandwidth is presented. This architecture uses a gated-ring-oscillator time-to-digital …
A 56.4-to-63.4 GHz multi-rate all-digital fractional-N PLL for FMCW radar applications in 65 nm CMOS
W Wu, RB Staszewski, JR Long - IEEE Journal of solid-state …, 2014 - ieeexplore.ieee.org
A mm-wave digital transmitter based on a 60 GHz all-digital phase-locked loop (ADPLL) with
wideband frequency modulation (FM) for FMCW radar applications is proposed. The …
wideband frequency modulation (FM) for FMCW radar applications is proposed. The …
A 12-Bit Vernier Ring Time-to-Digital Converter in 0.13 CMOS Technology
A 12-bit Vernier ring time-to-digital converter (TDC) with time resolution of 8 ps for digital-
phase-locked-loops (DPLL) is presented. This novel Vernier ring TDC places the Vernier …
phase-locked-loops (DPLL) is presented. This novel Vernier ring TDC places the Vernier …
A high-linearity, 17 ps precision time-to-digital converter based on a single-stage vernier delay loop fine interpolation
This paper presents a time-to-digital converter (TDC) architecture capable of reaching high-
precision and high-linearity with moderate area occupation per measurement channel. The …
precision and high-linearity with moderate area occupation per measurement channel. The …