Multi-core devices are envisioned to support the development of next-generation safety-
critical systems, enabling the on-chip integration of functions of different criticality. This …

In this work, we present Vicuna, a timing-predictable vector coprocessor. A vector processor
can be scaled to satisfy the performance requirements of massively parallel computation …

We introduce the strictly in-order core (SIC), a timing-predictable pipelined processor core.
SIC is provably timing compositional and free of timing anomalies. This enables precise and …

The need for increased application performance in high-integrity systems such as those in
avionics is on the rise as software continues to implement more complex functionalities. The …

Many engineering fields, such as automotive, aerospace, and the emerging challenges
towards industry 4.0, have to deal with Real-Time (RT) or Hard Real Time (HRT) systems …

The logical execution time (LET) model increases the compositionality of real-time task sets.
Removal or addition of tasks does not influence the communication behavior of other tasks …

Abstract The Reduced Complexity Many-Core architecture (RC/MC) targets to simplify timing
analysis by increasing the predictability of all components. Since shared memory …

The prevailing use of multicores in Embedded Critical Systems (ECS) is multi-application
workloads in which independent applications run in different cores with data sharing …

Autonomous mobile systems combine high performance requirements with safety criticality.
High performance hardware/software architectures, however, expose a far more complex …

High throughput applications with real-time guarantees are increasingly relevant. For these
applications, parallelism must be exposed to meet deadlines. Directed Acyclic Graphs …