Artificial neural networks for space and safety-critical applications: Reliability issues and potential solutions
P Rech - IEEE Transactions on Nuclear Science, 2024 - ieeexplore.ieee.org
Machine learning is among the greatest advancements in computer science and
engineering and is today used to classify or detect objects, a key feature in autonomous …
engineering and is today used to classify or detect objects, a key feature in autonomous …
Demystifying soft error assessment strategies on arm cpus: Microarchitectural fault injection vs. neutron beam experiments
A Chatzidimitriou, P Bodmann… - 2019 49th Annual …, 2019 - ieeexplore.ieee.org
Fault injection in early microarchitecture-level simulation CPU models and beam
experiments on the final physical CPU chip are two established methodologies to access the …
experiments on the final physical CPU chip are two established methodologies to access the …
Soft error effects on arm microprocessors: Early estimations versus chip measurements
PR Bodmann, G Papadimitriou… - IEEE Transactions …, 2021 - ieeexplore.ieee.org
Extensive research efforts are being carried out to evaluate and improve the reliability of
computing devices either through beam experiments or simulation-based fault injection …
computing devices either through beam experiments or simulation-based fault injection …
Multi-bit upsets vulnerability analysis of modern microprocessors
A Chatzidimitriou, G Papadimitriou… - 2019 IEEE …, 2019 - ieeexplore.ieee.org
Miniaturization of integrated circuits brings more devices (thus more functionality) on the
same silicon area but also makes them more vulnerable to soft (transient) errors …
same silicon area but also makes them more vulnerable to soft (transient) errors …
Syra: Early system reliability analysis for cross-layer soft errors resilience in memory arrays of microprocessor systems
Cross-layer reliability is becoming the preferred solution when reliability is a concern in the
design of a microprocessor-based system. Nevertheless, deciding how to distribute the error …
design of a microprocessor-based system. Nevertheless, deciding how to distribute the error …
Characterizing soft error vulnerability of cpus across compiler optimizations and microarchitectures
G Papadimitriou, D Gizopoulos - 2021 IEEE International …, 2021 - ieeexplore.ieee.org
In this paper, we present a fine-grained characterization of the impact of transient faults (soft
errors) on program execution for different compiler optimization levels and two out-of-order …
errors) on program execution for different compiler optimization levels and two out-of-order …
Demystifying GPU reliability: Comparing and combining beam experiments, fault simulation, and profiling
Graphics Processing Units (GPUs) have moved from being dedicated devices for multimedia
and gaming applications to general-purpose accelerators employed in High-Performance …
and gaming applications to general-purpose accelerators employed in High-Performance …
Characterizing a neutron-induced fault model for deep neural networks
FF Dos Santos, A Kritikakou… - … on Nuclear Science, 2022 - ieeexplore.ieee.org
The reliability evaluation of deep neural networks (DNNs) executed on graphic processing
units (GPUs) is a challenging problem, since the hardware architecture is highly complex …
units (GPUs) is a challenging problem, since the hardware architecture is highly complex …
Assessing the impact of compiler optimizations on GPUs reliability
Graphics Processing Units (GPUs) compilers have evolved in order to support general-
purpose programming languages for multiple architectures. NVIDIA CUDA Compiler …
purpose programming languages for multiple architectures. NVIDIA CUDA Compiler …
Performance monitor counters: Interplay between safety and security in complex cyber-physical systems
Recent years have witnessed the growth of the adoption of cyber-physical systems (CPSs)
in many sectors, such as automotive, aerospace, civil infrastructures, and healthcare …
in many sectors, such as automotive, aerospace, civil infrastructures, and healthcare …