A comprehensive survey on wireless sensor node hardware platforms

F Karray, MW Jmal, A Garcia-Ortiz, M Abid, AM Obeid - Computer Networks, 2018 - Elsevier
Wireless sensor nodes are the main components in wireless sensor networks. Such devices
affect the performance and the accuracy of the network. Countless commercial and research …

High-throughput and area-efficient architectures for image encryption using PRINCE cipher

A Kumar, P Singh, KAK Patro, B Acharya - Integration, 2023 - Elsevier
Abstract Internet of Things (IoT) has gained popularity in recent years and has engulfed
nearly every industry. The widespread use of numerous ubiquitous computing devices in the …

FPGA implementation of highly scalable AES algorithm using modified mix column with gate replacement technique for security application in TCP/IP

S Madhavapandian, P MaruthuPandi - Microprocessors and Microsystems, 2020 - Elsevier
Abstract Field Programmable Gate Arrays (FPGA) offers a faster, increasingly adjustable
arrangement. Earlier Data Encryption Standard (DES) algorithms have been developed …

An FPGA based reconfigurable IPSec ESP core suitable for IoT applications

M Rao, J Coleman, T Newe - 2016 10th International …, 2016 - ieeexplore.ieee.org
This work implements an FPGA (Field Programmable Gate Array) based reconfigurable
IPSec ESP core. The IPSec protocol, developed by the IETF (Internet Engineering Task …

Efficient and lightweight in-memory computing architecture for hardware security

H Ajmi, F Zayer, AH Fredj, H Belgacem… - Journal of Parallel and …, 2024 - Elsevier
This paper introduces an innovative solution for improving the efficiency and speed of the
Advanced Encryption Standard (AES) based cryptographic algorithm. The approach …

Data security system of text messaging based on android mobile devices using advanced encrytion standard dynamic s-box

AS Mabruri - Journal of Soft Computing Exploration, 2020 - shmpublisher.com
Most of the recent technologies are turning to mobile platforms, Android becames one of the
most widely used OS. Eventhough it has complete features, even it's not safe enough such …

Efficient and high speed fpga bump in the wire implementation for data integrity and confidentiality services in the iot

T Newe, M Rao, D Toal, G Dooly, E Omerdic… - Sensors for everyday life …, 2017 - Springer
Data integrity is a term used when referring to the accuracy and reliability of data. It ensures
that data is identically maintained during any operation, such as transfer, storage, or …

High speed implementation of a SHA-3 core on Virtex-5 and Virtex-6 FPGAs

M Rao, T Newe, I Grout, A Mathur - Journal of Circuits, Systems and …, 2016 - World Scientific
This work presents a novel technique for a high-speed implementation of the newly selected
cryptographic hash function, Secure Hash Algorithm-3 (SHA-3) on Xilinx's Virtex-5 and …

Efficient data aggregation technique for medical wireless body sensor networks

M Belhaj Mohamed, A Meddeb-Makhlouf… - tm-Technisches …, 2022 - degruyter.com
A central issue in Wireless Body Sensor Networks (WBSNs) is the large amount of
measurement data for monitoring vital parameters, which need to be continuously …

Effective hardware architectures for LED and PRESENT ciphers for resource-constrained applications

P Modi, P Singh, B Acharya - International Journal of High …, 2021 - inderscienceonline.com
Existing cyber physical systems (CPS) and internet-of-things (IoT) services depend largely
on the widespread implementation of tiny smart devices for tracking, storing, monitoring, and …