Area efficient in-plane nanomagnetic multiplier and convolution architecture design

S Sivasubramani, S Debroy, A Acharyya - Nano Express, 2021 - iopscience.iop.org
In this study, we propose a nanomagnetic logic (NML) based 2 bit multiplier architecture
design for the first time to the best of author's knowledge. This complex combinational logic …

A novel and reliable interlayer exchange coupled nanomagnetic universal logic gate design

V Mattela, S Debroy, S Sivasubramani… - …, 2020 - iopscience.iop.org
In this paper, we propose an interlayer exchange coupling (IEC) based 3D universal
NAND/NOR gate design methodology for the reliable and robust implementation of …

Power and area-efficient architectural design methodology for nanomagnetic computation

S Sivasubramani, S Debroy, A Acharyya - Nanoscale VLSI: Devices …, 2020 - Springer
Magnetic quantum-dot cellular automata (MQCA)-based nanomagnetic logic computation
started emerging to augment the CMOS-based traditional computing devices as Moore's law …