Hybrid MTJ/CNTFET-based binary synapse and neuron for process-in-memory architecture

MT Nasab, A Amirany, MH Moaiyeri… - IEEE Magnetics …, 2023 - ieeexplore.ieee.org
This letter develops a reliable, integrated binary synapse and neuron model for hardware
implementation of binary neural networks. Thanks to the nonvolatile nature of magnetic …

A novel dual-reference sensing scheme for computing in memory within STT-MRAM

X Jiang, J Bao, L Zhang, L Bai - Microelectronics Journal, 2022 - Elsevier
With the rapid development of the Internet of Things and artificial intelligence, it is more and
more difficult for the existing hardware structure to process billions of data. In conventional …

Efficiency of double-barrier magnetic tunnel junction-based digital eNVM array for neuro-inspired computing

T Moposita, E Garzón, F Crupi… - … on Circuits and …, 2023 - ieeexplore.ieee.org
This brief deals with the impact of spin-transfer torque magnetic random access memory
(STT-MRAM) cell based on double-barrier magnetic tunnel junction (DMTJ) on the …

High performance and low power spintronic binarized neural network hardware accelerator

MT Nasab, A Amirany, MH Moaiyeri… - 2022 30th International …, 2022 - ieeexplore.ieee.org
Neural networks have shown a high ability to model and solve complex problems. Hardware
implementation of the neural network can also increase the efficiency of this system and, in …

Area-efficient auto-write-terminate circuit for NV latch and logic-in-memory applications

J Rajpoot, S Verma - … Transactions on Circuits and Systems II …, 2023 - ieeexplore.ieee.org
Spin transfer torque (STT) based magnetic tunnel junction (MTJ) device is a commercially
appealing option for non-volatile latches and flip-flops. In this brief, an STT-MTJ based non …

SIMPLY+: A Reliable STT-MRAM Based Smart Material Implication Architecture For In-Memory Computing

T Moposita, E Garzón, R De Rose, F Crupi… - IEEE …, 2023 - ieeexplore.ieee.org
This paper introduces SIMPLY+, an advanced Spin-Transfer Torque Magnetic Random-
Access Memory (STT-MRAM)-based Logic-in-Memory (LIM) architecture that evolves from …

A Novel Energy-Efficient Sinusoidal Power Clocking-based Writing Circuitry for the hybrid CMOS/MTJ architecture

W Yang, A Degada, H Thapliyal - IEEE Transactions on …, 2024 - ieeexplore.ieee.org
Spin transfer torque magnetic random access memory (STT-MRAM) offers a promising
solution for low-power and high-density memory due to its compatibility with CMOS, higher …

DMTJ-based non-volatile ternary content addressable memory for energy-efficient high-performance systems

K Vicuña, LM Prócel, L Trojman… - 2022 IEEE 13th Latin …, 2022 - ieeexplore.ieee.org
This paper explores performance of non-volatile ternary content addressable memories (NV-
TCAMs), exploiting double-barrier magnetic tunnel junction (DMTJ) as comparatively …

A High Performance MRAM Cell Through Single Free-Layer Dual Fixed-Layer Magnetic Tunnel Junction

I Alibeigi, M Tabandeh, SB Shouraki… - IEEE Transactions …, 2022 - ieeexplore.ieee.org
As technology size scales down, magnetic tunnel junctions (MTJs) as a promising
technology are becoming more and more sensitive to process variation, especially in oxide …

Novel Circuit for In-Memory Computing within STT-RAM Memory Blocks

P Shafaghi, Y Rezaeiyan, S Shreya… - 2024 IEEE Nordic …, 2024 - ieeexplore.ieee.org
While the von Neumann architectures involve separate processing and memory units, the
movement of data between them results in considerable time and energy expenses. One …