A survey of computer architecture simulation techniques and tools

A Akram, L Sawalha - Ieee Access, 2019 - ieeexplore.ieee.org
Computer architecture simulators play an important role in advancing computer architecture
research. With wider research directions and the increased number of simulators that have …

Ramulator: A fast and extensible DRAM simulator

Y Kim, W Yang, O Mutlu - IEEE Computer architecture letters, 2015 - ieeexplore.ieee.org
Recently, both industry and academia have proposed many different roadmaps for the future
of DRAM. Consequently, there is a growing need for an extensible DRAM simulator, which …

Graphene: Strong yet lightweight row hammer protection

Y Park, W Kwon, E Lee, TJ Ham… - 2020 53rd Annual …, 2020 - ieeexplore.ieee.org
Row Hammer is a serious security threat to modern computing systems using DRAM as
main memory. It causes charge loss in DRAM cells adjacent to a frequently activated …

Shadow: Preventing row hammer in dram with intra-subarray row shuffling

M Wi, J Park, S Ko, MJ Kim, NS Kim… - … Symposium on High …, 2023 - ieeexplore.ieee.org
As Row Hammer (RH) attacks have been a critical threat to computer systems, numerous
hardware-based (HWbased) RH mitigation strategies have been proposed. However, the …

Kiln: Closing the performance gap between systems with and without persistence support

J Zhao, S Li, DH Yoon, Y Xie, NP Jouppi - … of the 46th Annual IEEE/ACM …, 2013 - dl.acm.org
Persistent memory is an emerging technology which allows in-memory persistent data
objects to be updated at much higher throughput than when using disks as persistent …

TWiCe: Preventing row-hammering by exploiting time window counters

E Lee, I Kang, S Lee, GE Suh, JH Ahn - Proceedings of the 46th …, 2019 - dl.acm.org
Computer systems using DRAM are exposed to row-hammer (RH) attacks, which can flip
data in a DRAM row without directly accessing a row but by frequently activating its adjacent …

uops. info: Characterizing latency, throughput, and port usage of instructions on intel microarchitectures

A Abel, J Reineke - Proceedings of the Twenty-Fourth International …, 2019 - dl.acm.org
Modern microarchitectures are some of the world's most complex man-made systems. As a
consequence, it is increasingly difficult to predict, explain, let alone optimize the …

A survey of cache simulators

H Brais, R Kalayappan, PR Panda - ACM Computing Surveys (CSUR), 2020 - dl.acm.org
Computer architecture simulation tools are essential for implementing and evaluating new
ideas in the domain and can be useful for understanding the behavior of programs and …

Mithril: Cooperative row hammer protection on commodity dram leveraging managed refresh

MJ Kim, J Park, Y Park, W Doh, N Kim… - … Symposium on High …, 2022 - ieeexplore.ieee.org
Since its public introduction in the mid-2010s, the Row Hammer (RH) phenomenon has
drawn significant attention from the research community due to its security implications …

Architecting to achieve a billion requests per second throughput on a single key-value store server platform

S Li, H Lim, VW Lee, JH Ahn, A Kalia… - Proceedings of the …, 2015 - dl.acm.org
Distributed in-memory key-value stores (KVSs), such as memcached, have become a critical
data serving layer in modern Internet-oriented datacenter infrastructure. Their performance …