Tapir: Embedding fork-join parallelism into LLVM's intermediate representation

TB Schardl, WS Moses, CE Leiserson - Proceedings of the 22nd ACM …, 2017 - dl.acm.org
This paper explores how fork-join parallelism, as supported by concurrency platforms such
as Cilk and OpenMP, can be embedded into a compiler's intermediate representation (IR) …

[图书][B] The compiler design handbook: optimizations and machine code generation

YN Srikant, P Shankar - 2002 - taylorfrancis.com
The widespread use of object-oriented languages and Internet security concerns are just the
beginning. Add embedded systems, multiple memory banks, highly pipelined units …

S-cave: Effective ssd caching to improve virtual machine storage performance

T Luo, S Ma, R Lee, X Zhang, D Liu… - Proceedings of the …, 2013 - ieeexplore.ieee.org
A unique challenge for SSD storage caching management in a virtual machine (VM)
environment is to accomplish the dual objectives: maximizing utilization of shared SSD …

Communication optimizations for fine-grained UPC applications

WY Chen, C Iancu, K Yelick - 14th International Conference on …, 2005 - ieeexplore.ieee.org
Global address space languages like UPC exhibit high performance and portability on a
broad class of shared and distributed memory parallel architectures. The most scalable …

Tapir: Embedding recursive fork-join parallelism into llvm's intermediate representation

TB Schardl, WS Moses, CE Leiserson - ACM Transactions on Parallel …, 2019 - dl.acm.org
Tapir (pronounced TAY-per) is a compiler intermediate representation (IR) that embeds
recursive fork-join parallelism, as supported by task-parallel programming platforms such as …

INSPIRE: The Insieme parallel intermediate representation

H Jordan, S Pellegrini, P Thoman… - Proceedings of the …, 2013 - ieeexplore.ieee.org
Programming standards like OpenMP, OpenCL and MPI are frequently considered
programming languages for developing parallel applications for their respective kind of …

Hiding relaxed memory consistency with compilers

J Lee, DA Padua - Proceedings 2000 International Conference …, 2000 - ieeexplore.ieee.org
We present a compiler technique, which is based on Shasha and Snir's delay set analysis,
to hide the underlying related memory consistency model for an optimizing compiler for …

Advanced verification of distributed WS-BPEL business processes incorporating CSSA-based data flow analysis

W Amme, A Martens, S Moser - International Journal of …, 2009 - inderscienceonline.com
The business process execution language for web services (WS-BPEL) provides a
technology to aggregate encapsulated functionalities for defining high-value web services …

Basic compiler algorithms for parallel programs

J Lee, DA Padua, SP Midkiff - ACM SIGPLAN Notices, 1999 - dl.acm.org
Traditional compiler techniques developed for sequential programs do not guarantee the
correctness (sequential consistency) of compiler transformations when applied to parallel …

Deriving explicit data links in WS-BPEL processes

O Kopp, R Khalaf, F Leymann - 2008 IEEE International …, 2008 - ieeexplore.ieee.org
WS-BPEL is a standard language to model business processes. Control flow is modeled
explicitly using links. Data is passed via shared variables and there is no notion of explicit …