A survey of machine learning for computer architecture and systems

N Wu, Y Xie - ACM Computing Surveys (CSUR), 2022 - dl.acm.org
It has been a long time that computer architecture and systems are optimized for efficient
execution of machine learning (ML) models. Now, it is time to reconsider the relationship …

Pythia: A customizable hardware prefetching framework using online reinforcement learning

R Bera, K Kanellopoulos, A Nori, T Shahroodi… - MICRO-54: 54th Annual …, 2021 - dl.acm.org
Past research has proposed numerous hardware prefetching techniques, most of which rely
on exploiting one specific type of program context information (eg, program counter …

A survey of machine learning applied to computer architecture design

DD Penney, L Chen - arXiv preprint arXiv:1909.12373, 2019 - arxiv.org
Machine learning has enabled significant benefits in diverse fields, but, with a few
exceptions, has had limited impact on computer architecture. Recent work, however, has …

Pixel: Photonic neural network accelerator

K Shiflett, D Wright, A Karanth… - 2020 IEEE International …, 2020 - ieeexplore.ieee.org
Machine learning (ML) architectures such as Deep Neural Networks (DNNs) have achieved
unprecedented accuracy on modern applications such as image classification and speech …

High-performance, energy-efficient, fault-tolerant network-on-chip design using reinforcement learning

K Wang, A Louri, A Karanth… - 2019 Design, Automation …, 2019 - ieeexplore.ieee.org
Network-on-Chips (NoCs) are becoming the standard communication fabric for multi-core
and system on a chip (SoC) architectures. As technology continues to scale, transistors and …

IntelliNoC: A holistic design framework for energy-efficient and reliable on-chip communication for manycores

K Wang, A Louri, A Karanth, R Bunescu - Proceedings of the 46th …, 2019 - dl.acm.org
As technology scales, Network-on-Chips (NoCs), currently being used for on-chip
communication in manycore architectures, face several problems including high network …

Experiences with ml-driven design: A noc case study

J Yin, S Sethumurugan, Y Eckert… - … Symposium on High …, 2020 - ieeexplore.ieee.org
There has been a lot of recent interest in applying machine learning (ML) to the design of
systems, which purports to aid human experts in extracting new insights leading to better …

Cure: A high-performance, low-power, and reliable network-on-chip design using reinforcement learning

K Wang, A Louri - IEEE Transactions on Parallel and …, 2020 - ieeexplore.ieee.org
We propose CURE, a deep reinforcement learning (DRL)-based NoC design framework that
simultaneously reduces network latency, improves energy-efficiency, and tolerates transient …

Deep reinforcement learning enabled self-configurable networks-on-chip for high-performance and energy-efficient computing systems

MF Reza - IEEE Access, 2022 - ieeexplore.ieee.org
Network-on-Chips (NoC) has been the superior interconnect fabric for multi/many-core on-
chip systems because of its scalability and parallelism. On-chip network resources can be …

ALPHA: A learning-enabled high-performance network-on-chip router design for heterogeneous manycore architectures

Y Li, A Louri - IEEE Transactions on Sustainable Computing, 2020 - ieeexplore.ieee.org
Heterogeneous manycores comprised of CPUs, GPUs and accelerators are putting stringent
demands on network-on-chips (NoCs). The NoCs need to support the combined traffic …