Physically aware synthesis revisited: guiding technology mapping with primitive logic gate placement
A typical VLSI design flow is divided into separated front-end logic synthesis and back-end
physical design (PD) stages, which often require costly iterations between these stages to …
physical design (PD) stages, which often require costly iterations between these stages to …
PowPrediCT: Cross-Stage Power Prediction with Circuit-Transformation-Aware Learning
Accurate and efficient power analysis at early VLSI design stages is critical for effective
power optimization. It is a promising yet challenging task to model the circuit power at early …
power optimization. It is a promising yet challenging task to model the circuit power at early …