Sorting with asymmetric read and write costs

GE Blelloch, JT Fineman, PB Gibbons, Y Gu… - Proceedings of the 27th …, 2015 - dl.acm.org
Emerging memory technologies have a significant gap between the cost, both in time and in
energy, of writing to memory versus reading from memory. In this paper we present models …

Parallel write-efficient algorithms and data structures for computational geometry

GE Blelloch, Y Gu, J Shun, Y Sun - … of the 30th on Symposium on …, 2018 - dl.acm.org
In this paper, we design parallel write-efficient geometric algorithms that perform
asymptotically fewer writes than standard algorithms for the same problem. This is motivated …

Two-level main memory co-design: Multi-threaded algorithmic primitives, analysis, and simulation

MA Bender, JW Berry, SD Hammond… - Journal of Parallel and …, 2017 - Elsevier
A challenge in computer architecture is that processors often cannot be fed data from DRAM
as fast as CPUs can consume it. Therefore, many applications are memory-bandwidth …

k-Means Clustering on Two-Level Memory Systems

MA Bender, J Berry, SD Hammond, B Moore… - Proceedings of the …, 2015 - dl.acm.org
In recent work we quantified the anticipated performance boost when a sorting algorithm is
modified to leverage user-addressable" near-memory," which we call scratchpad. This …

[PDF][PDF] Engineering Aggregation Operators for Relational In-Memory Database Systems

I Müller - 2016 - researchgate.net
Relational Aggregation is one of the major means to analyze large data sets since the
creation of the first database systems. Available hardware performance continues to grow at …

[PDF][PDF] Write-efficient Algorithms

Y Gu - 2018 - reports-archive.adm.cs.cmu.edu
New non-volatile memory (NVM) technologies are projected to become the dominant type of
main memory in the near future. They promise byteaddressability, good read latencies, and …

Parallel algorithms in geometry

MT Goodrich, N Sitchinava - Handbook of Discrete and …, 2017 - taylorfrancis.com
The goal of parallel algorithm design is to develop parallel computational methods that run
very fast with as few processors as possible, and there is an extensive literature of such …

Computational geometry in the parallel external memory model

N Sitchinava - SIGSPATIAL Special, 2012 - dl.acm.org
Continued advances in VLSI scaling combined with unsustainable power consumption of
frequency scaling resulted in parallel processors having become mainstream as …

Bounding cache miss costs of multithreaded computations under general schedulers

R Cole, V Ramachandran - Proceedings of the 29th ACM Symposium on …, 2017 - dl.acm.org
We analyze the caching overhead incurred by a class of multithreaded algorithms when
scheduled by an arbitrary scheduler. We obtain bounds that match or improve upon the well …

A performance model for GPU architectures: analysis and design of fundamental algorithms

B Karsin - 2018 - scholarspace.manoa.hawaii.edu
Over the past decade,\many-core" architectures have become a crucial resources for solving
com-putationally challenging problems. These systems rely on hundreds or thousands of …