Dynamic adaptive replacement policy in shared last-level cache of DRAM/PCM hybrid memory for big data storage
The increasing demand on the main memory capacity is one of the main big data
challenges. Dynamic random access memory (DRAM) does not represent the best choice …
challenges. Dynamic random access memory (DRAM) does not represent the best choice …
Nvlsm: A persistent memory key-value store using log-structured merge tree with accumulative compaction
Computer systems utilizing byte-addressable Non-Volatile Memory (NVM) as
memory/storage can provide low-latency data persistence. The widely used key-value stores …
memory/storage can provide low-latency data persistence. The widely used key-value stores …
A maximum cache value policy in hybrid memory-based edge computing for mobile devices
Edge computing is proposed to bridge mobile devices with cloud computing data centers in
the era of mobile big data, as an intermediate level of computing power. One important issue …
the era of mobile big data, as an intermediate level of computing power. One important issue …
Cost aware cache replacement policy in shared last-level cache for hybrid memory based fog computing
Fog computing requires a large main memory capacity to decrease latency and increase the
Quality of Service (QoS). However, dynamic random access memory (DRAM), the commonly …
Quality of Service (QoS). However, dynamic random access memory (DRAM), the commonly …
Reducing writebacks through in-cache displacement
Non-Volatile Memory (NVM) technology is a promising solution to fulfill the ever-growing
need for higher capacity in the main memory of modern systems. Despite having many great …
need for higher capacity in the main memory of modern systems. Despite having many great …
MALRU: Miss-penalty aware LRU-based cache replacement for hybrid memory systems
Current DRAM based memory systems face the scalability challenges in terms of storage
density, power, and cost. Hybrid memory architecture composed of emerging Non-Volatile …
density, power, and cost. Hybrid memory architecture composed of emerging Non-Volatile …
Write-back aware shared last-level cache management for hybrid main memory
Hybrid main memory with both DRAM and emerging non-volatile memory (NVM) becomes a
promising solution for high performance and energy-efficient embedded systems. Cache …
promising solution for high performance and energy-efficient embedded systems. Cache …
Thermal-constrained memory management for three-dimensional DRAM-PCM memory with deep neural network applications
SY Lin, SC Wang - Microprocessors and Microsystems, 2022 - Elsevier
For the deep neural network applications, the requirement of the memory bandwidth and
volume is huge. Multiple DRAM and PCM (phase-change memory) chips are stacked to form …
volume is huge. Multiple DRAM and PCM (phase-change memory) chips are stacked to form …
[HTML][HTML] HSCS: A hybrid shared cache scheduling scheme for multiprogrammed workloads
The traditional dynamic random-access memory (DRAM) storage medium can be integrated
on chips via modern emerging 3D-stacking technology to architect a DRAM shared cache in …
on chips via modern emerging 3D-stacking technology to architect a DRAM shared cache in …
Miss penalty aware cache replacement for hybrid memory systems
Current DRAM-based memory systems face the scalability challenges in terms of memory
density, energy consumption, and monetary cost. Hybrid memory architectures composed of …
density, energy consumption, and monetary cost. Hybrid memory architectures composed of …