A review of NBTI mechanisms and models

S Mahapatra, N Parihar - Microelectronics Reliability, 2018 - Elsevier
A comprehensive review is done of different NBTI mechanisms and models proposed in the
literature over the past years. The Reaction-Diffusion (RD) model based comprehensive …

Modeling of NBTI kinetics in RMG Si and SiGe FinFETs, part-I: DC stress and recovery

N Parihar, RG Southwick, M Wang… - … on Electron Devices, 2018 - ieeexplore.ieee.org
An ultrafast (10-μs delay) measurement technique is used to characterize the negative bias
temperature instability-induced threshold voltage shift (ΔV T) in replacement metal gate …

Integrated modeling of self-heating of confined geometry (FinFET, NWFET, and NSHFET) transistors and its implications for the reliability of sub-20 nm modern …

W Ahn, SH Shin, C Jiang, H Jiang, MA Wahab… - Microelectronics …, 2018 - Elsevier
The evolution of transistor topology from planar to confined geometry transistors (ie, FinFET,
Nanowire FET, Nanosheet FET) has met the desired performance specification of sub-20 nm …

A 3-D TCAD framework for NBTI, Part-II: Impact of mechanical strain, quantum effects, and FinFET dimension scaling

R Tiwari, N Parihar, K Thakor, HY Wong… - … on Electron Devices, 2019 - ieeexplore.ieee.org
The TCAD framework developed in part-I of this paper is used to study the impact of fin
length (FL) and fin width (FW) scaling on interface trap generation (ΔV IT) during negative …

Negative bias-temperature instabilities and low-frequency noise in Ge FinFETs

X Luo, EX Zhang, PF Wang, K Li… - … on Device and …, 2023 - ieeexplore.ieee.org
Negative bias-temperature instabilities and low-frequency noise are investigated in strained
Ge MOS FinFETs with SiO textsubscript 2/HfO textsubscript 2 gate dielectrics. The extracted …

Comparison of DC and AC NBTI kinetics in RMG Si and SiGe p-FinFETs

N Parihar, RG Southwick, U Sharma… - 2017 IEEE …, 2017 - ieeexplore.ieee.org
An ultrafast characterization method is used to study DC and AC NBTI in Si and SiGe
channel core RMG p-FinFETs. The time evolution of degradation during and after stress, and …

Predictive TCAD for NBTI stress-recovery in various device architectures and channel materials

S Mishra, HY Wong, R Tiwari… - 2017 IEEE …, 2017 - ieeexplore.ieee.org
A 3-D TCAD framework is proposed for simulating Negative Bias Temperature Instability
(NBTI) in Silicon (Si) and Silicon Germanium (SiGe) channel p-MOSFETs. Different types of …

Prediction of NBTI stress and recovery time kinetics in Si capped SiGe p-MOSFETs

N Parihar, S Mahapatra - 2018 IEEE International Reliability …, 2018 - ieeexplore.ieee.org
NBTI stress and recovery temporal kinetics at different experimental conditions are predicted
in Si and SiGe (having Si cap) p-MOSFETs. Mutually uncorrelated contributions from …

Hot electron and hot hole induced degradation of SiGe p-FinFETs studied by degradation maps in the entire bias space

J Franco, B Kaczer, A Chasin, E Bury… - 2018 IEEE …, 2018 - ieeexplore.ieee.org
We study hot carrier degradation in Si 0. 75 Ge 0. 25 p-FinFETs by measuring degradation
maps in the entire bias space and compare with Si counterparts. Hot carrier effects are found …

BTI reliability and time-dependent variability of stacked gate-all-around Si nanowire transistors

A Chasin, J Franco, B Kaczer, V Putcha… - 2017 IEEE …, 2017 - ieeexplore.ieee.org
We report experimental results of the N/PBTl (Negative/Positive Bias Temperature Instability)
reliability of vertically stacked Gate-All-Around (GAA) silicon nanowire (NW) MOSFETs. We …