Using the probabilistic transfer matrix model as the major technology, this paper firstly
separated the presentation and quantification of signal relations, and blocked the concurrent …

The increase in the reliability requirements of integrated circuits applied in diverse smart
sensing devices and the increase in the cost of test generation and fault simulation have …

The progressive downscaling of feature sizes increases the susceptibility to Single Event
Effects in integrated circuits, mainly due to the voltage scaling. As a manner to mitigate this …

A method is proposed for probabilistic testability analysis of digital circuits focusing on
calculating the probabilistic controllability measures in terms of signal probabilities with the …

Purpose–One of the main issues which microelectronics industry encounter is reliability as
feature sizes scale down to nano-design level. The purpose of this paper is to provide a …

The first ideas of structural Binary Decision Diagrams (BDDs) date back to the 70s. The
primary motivation for introducing this model into the test field, initially under the name of …