A Perspective View of Silicon Based Classical to Non-Classical MOS Transistors and their Extension in Machine Learning

AP Singh, VK Mishra, S Akhter - Silicon, 2023 - Springer
Unprecedented growth in CMOS technology and demand of high-density integrated circuits
(ICs) in semiconductor industry has motivated to research community towards the …

Nanowire & nanosheet FETs for ultra-scaled, high-density logic and memory applications

A Veloso, T Huynh-Bao, P Matagne, D Jang… - Solid-State …, 2020 - Elsevier
We report on vertically stacked lateral nanowires (NW)/nanosheets (NS) gate-all-around
(GAA) FET devices as promising candidates to obtain a better power-performance metric for …

Recent trends in novel semiconductor devices

A Pandey - Silicon, 2022 - Springer
The VLSI industry has grown a lot for several decades. The Packing density of integrated
circuits has been increased without compromising the functionality. Scaling of …

A machine learning approach for optimization of channel geometry and source/drain doping profile of stacked nanosheet transistors

H Xu, W Gan, L Cao, C Yang, J Wu… - … on Electron Devices, 2022 - ieeexplore.ieee.org
Complex nonlinear dependence of ultra-scaled transistor performance on its channel
geometry and source/drain (S/D) doping profile bring obstacles in the advanced technology …

5-nm gate-all-around transistor technology with 3-D stacked nanosheets

AK Gundu, V Kursun - IEEE Transactions on Electron Devices, 2022 - ieeexplore.ieee.org
A comprehensive computational study of gate-all-around (GAA) devices with 3-D stacked
silicon nanosheets (also known as nanoribbons or nanowires) is presented in this article …

Opportunities and challenges in designing and utilizing vertical nanowire FET (V-NWFET) standard cells for beyond 5 nm

T Song - IEEE Transactions on Nanotechnology, 2019 - ieeexplore.ieee.org
Nanowire field-effect transistors (NWFETs) are known to become the emerging transistor
type for better performance and low power for future technology nodes beyond 7 nm. Their …

Punch-through-stopper free nanosheet FETs with crescent inner-spacer and isolated source/drain

JS Yoon, J Jeong, S Lee, RH Baek - IEEE Access, 2019 - ieeexplore.ieee.org
Structural modifications of 5-nm node nanosheet FETs (NSFETs) were quantitatively
analyzed using fully calibrated TCAD. The NSFETs with crescent inner spacer improve the …

Scaling beyond 7nm node: An overview of gate-all-around fets

W Hu, F Li - 2021 9th international symposium on next …, 2021 - ieeexplore.ieee.org
Gate-all-around (GAA) is a promising MOSFET structure to continue scaling down the size of
CMOS devices beyond 7 nm technology node. This paper gives an overview of different …

Electrical coupling effect of forksheet FET for power, performance, and area analysis

J Lee, JS Yoon, J Lim, RH Baek - IEEE Transactions on …, 2022 - ieeexplore.ieee.org
We analyze the electrical coupling effect of a fork-shaped field-effect transistor (FSFET) and
compare FSFET and the nanosheet FET (NSFET) in terms of logic cell power, performance …

Effect of gate length on performance of 5nm node N-channel nano-sheet transistors for analog circuits

YP Pundir, R Saha, PK Pal - Semiconductor Science and …, 2020 - iopscience.iop.org
In this work, the effect of channel length on the performance of an N-channel Nano-sheet
Transistor (NST) for analog circuits has been investigated. A fully-calibrated TCAD platform …