Graphics Processing Units (GPUs) are widely used as the accelerator of choice for
applications with massively data-parallel tasks. However, recent studies show that GPUs …

A number of techniques to achieve power-efficient Network-on-Chips (NoCs) have been
proposed, two of which are power-gating and dynamic voltage and frequency scaling …

CPU-GPU heterogeneous systems are emerging as architectures of choice for high-
performance energy-efficient computing. Designing on-chip interconnects for such systems …

Virtual channels are employed to improve the throughput under high traffic loads in
Networks-on-Chips (NoCs). However, they can impose non-negligible overheads on …

Execution units in GPGPU consume much static power. However, reducing the static power
of execution units is not clear based on two reasons. First, the very long idle time of …

Graphics Processing Units (GPUs) employ large register files to accommodate all active
threads and accelerate context switching. Unfortunately, register files are a scalability …

Abstract Network-on-Chips (NoCs) consume a significant portion of multiprocessors' total
power. Dynamic Voltage Scaling (DVS) which can reduce both static and dynamic power …

Crosstalk faults occurring in wires of Networks on Chip (NoCs) can seriously threaten the
reliability of data transfer. One efficient way to tackle crosstalk faults is numeral-based …

CPU-GPU integrated systems are emerging as a high-performance and easily-
programmable heterogeneous platform to facilitate development of data-parallel software …

In this work, we evaluate aggressive undervolting, ie, voltage underscaling below the
nominal level to reduce the energy consumption of Field Programmable Gate Arrays …