[PDF][PDF] List of references on evolutionary multiobjective optimization

CAC Coello - URL< http://www. lania. mx/~ ccoello/EMOO …, 2010 - delta.cs.cinvestav.mx
List of References on Evolutionary Multiobjective Optimization Page 1 List of References on
Evolutionary Multiobjective Optimization Carlos A. Coello Coello ccoello@cs.cinvestav.mx …

PAnDA: A reconfigurable architecture that adapts to physical substrate variations

JA Walker, MA Trefzer, SJ Bale… - IEEE Transactions on …, 2013 - ieeexplore.ieee.org
Field programmable gate arrays (FPGAs) are widely used in applications where online
reconfigurable signal processing is required. Speed and function density of FPGAs are …

Open-ended evolution to discover analogue circuits for beyond conventional applications

YA Sapargaliyev, TG Kalganova - Genetic Programming and Evolvable …, 2012 - Springer
Analogue circuits synthesised by means of open-ended evolutionary algorithms often have
unconventional designs. However, these circuits are typically highly compact, and the …

Evolutionary design of polymorphic gates using ambipolar transistors

J Nevoral, R Ruzicka, V Mrazek - 2016 IEEE Symposium Series …, 2016 - ieeexplore.ieee.org
The objective of the paper is to introduce a new approach to the evolutionary design of
polymorphic digital circuits conducted directly at transistor level. A discrete event-driven …

Evolutionary design of transistor level digital circuits using discrete simulation

V Mrazek, Z Vasicek - … , EuroGP 2015, Copenhagen, Denmark, April 8-10 …, 2015 - Springer
The objective of the paper is to introduce a new approach to the evolutionary design of
digital circuits conducted directly at transistor level. In order to improve the time consuming …

[PDF][PDF] Overcoming faults using evolution on the PAnDA architecture.

PB Campos, DMR Lawson, SJ Bale… - IEEE Congress on …, 2013 - www-users.york.ac.uk
This paper explores the potential for transistor level fault tolerance on a new Programmable
Analogue and Digital Array (PAnDA) architecture1. In particular, this architecture features …

[图书][B] Adapting Hardware Systems by Means of Multi-Objective Evolution

P Kaufmann - 2013 - books.google.com
Reconfigurable circuit devices have opened up a fundamentally new way of creating
adaptable systems. Combined with artificial evolution, reconfigurable circuits allow an …

Acceleration of transistor-level evolution using Xilinx Zynq Platform

V Mrazek, Z Vasicek - 2014 IEEE International Conference on …, 2014 - ieeexplore.ieee.org
The aim of this paper is to introduce a new accelerator developed to address the problem of
evolutionary synthesis of digital circuits at transistor level. The proposed accelerator, based …

Fighting stochastic variability in a D‐type flip‐flop with transistor‐level reconfiguration

MA Trefzer, JA Walker, SJ Bale… - IET Computers & Digital …, 2015 - Wiley Online Library
In this study, the authors present a design optimisation case study of D‐type flip‐flop timing
characteristics that are degraded as a result of intrinsic stochastic variability in a 25 nm …

[PDF][PDF] Diseño automático de circuitos electrónicos analógicos mediante algoritmos evolutivos

F Castejón Lapeyra - 2020 - e-spacio.uned.es
Los circuitos electrónicos analógicos se caracterizan por utilizar un rango continuo de
valores de una magnitud, tanto en su entrada como en su salida, a diferencia de los …