A low latency modular-level deeply integrated MFCC feature extraction architecture for speech recognition

AX Glittas, L Gopalakrishnan - Integration, 2021 - Elsevier
In this paper, a low-complex chip to extract the Mel Frequency Cepstral Coefficient for a
speech recognition system is presented. The architecture can operate in a continuous-flow …

A Low-Power Hardware Accelerator of MFCC Extraction for Keyword Spotting in 22nm FDSOI

L Guo, M Jobst, J Partzsch, S Scholze… - 2023 IEEE 5th …, 2023 - ieeexplore.ieee.org
With the development of artificial intelligence, the real-time feature extraction of acoustic
signals is required in a wide variety of applications, such as keyword spotting and speech …

A Low-Resource-Cost FPGA Implementation of Population Threshold Coding for Spiking Neural Networks

X Wang, C Yang, A Wang - 2024 4th International Conference …, 2024 - ieeexplore.ieee.org
Spike encoding plays a vital role in the advancement of neuromorphic computing as the
spike sequences represent the information of raw data. Both rate coding and temporal …

Solar Autonomous Controllable MFCC-Based Improved Cable External Damage Voice Print Identification System

K Sun, Y Huo, Y Gao, B Yang, P Sun… - … and Power Systems …, 2024 - ieeexplore.ieee.org
According to the statistical analysis of the State Grid Corporation, cable failures are mainly
caused by quality problems and external damage, accounting for more than 50% and 30 …

Design and implementation of a speech recognition module based on RISC-V embedded processor

C Ding, Y Zhu, R Zhao, X Zhang - 2023 8th International …, 2023 - ieeexplore.ieee.org
Due to the increasing demand for speech recognition in terminal devices, in order to speed
up the speech recognition process in embedded processors and improve the speech …