Survey of scheduling techniques for addressing shared resources in multicore processors

S Zhuravlev, JC Saez, S Blagodurov… - ACM Computing …, 2012 - dl.acm.org
Chip multicore processors (CMPs) have emerged as the dominant architecture choice for
modern computing platforms and will most likely continue to be dominant well into the …

A survey on cache management mechanisms for real-time embedded systems

G Gracioli, A Alhammad, R Mancuso… - ACM Computing …, 2015 - dl.acm.org
Multicore processors are being extensively used by real-time systems, mainly because of
their demand for increased computing power. However, multicore processors have shared …

A survey of microarchitectural timing attacks and countermeasures on contemporary hardware

Q Ge, Y Yarom, D Cock, G Heiser - Journal of Cryptographic Engineering, 2018 - Springer
Microarchitectural timing channels expose hidden hardware states though timing. We survey
recent attacks that exploit microarchitectural features in shared hardware, especially as they …

Catalyst: Defeating last-level cache side channel attacks in cloud computing

F Liu, Q Ge, Y Yarom, F Mckeen… - … symposium on high …, 2016 - ieeexplore.ieee.org
Cache side channel attacks are serious threats to multi-tenant public cloud platforms. Past
work showed how secret information in one virtual machine (VM) can be extracted by …

Memory resource management in VMware ESX server

CA Waldspurger - ACM SIGOPS Operating Systems Review, 2002 - dl.acm.org
VMware ESX Server is a thin software layer designed to multiplex hardware resources
efficiently among virtual machines running unmodified commodity operating systems. This …

Website fingerprinting through the cache occupancy channel and its real world practicality

A Shusterman, Z Avraham, E Croitoru… - … on Dependable and …, 2020 - ieeexplore.ieee.org
Website fingerprinting attacks use statistical analysis on network traffic to compromise user
privacy. The classical attack model used to evaluate website fingerprinting attacks assumes …

Addressing shared resource contention in multicore processors via scheduling

S Zhuravlev, S Blagodurov, A Fedorova - ACM Sigplan Notices, 2010 - dl.acm.org
Contention for shared resources on multicore processors remains an unsolved problem in
existing systems despite significant research efforts dedicated to this problem in the past …

PALLOC: DRAM bank-aware memory allocator for performance isolation on multicore platforms

H Yun, R Mancuso, ZP Wu… - 2014 IEEE 19th Real …, 2014 - ieeexplore.ieee.org
DRAM consists of multiple resources called banks that can be accessed in parallel and
independently maintain state information. In Commercial Off-The-Shelf (COTS) multicore …

[HTML][HTML] Scheduling and locking in multiprocessor real-time operating systems

BB Brandenburg - 2011 - search.proquest.com
With the widespread adoption of multicore architectures, multiprocessors are now a
standard deployment platform for (soft) real-time applications. This dissertation addresses …

Real-time cache management framework for multi-core architectures

R Mancuso, R Dudko, E Betti, M Cesati… - 2013 IEEE 19th Real …, 2013 - ieeexplore.ieee.org
Multi-core architectures are shaking the fundamental assumption that in real-time systems
the WCET, used to analyze the schedulability of the complete system, is calculated on …