Petri nets: Properties, analysis and applications

T Murata - Proceedings of the IEEE, 1989 - ieeexplore.ieee.org
Starts with a brief review of the history and the application areas considered in the literature.
The author then proceeds with introductory modeling examples, behavioral and structural …

Modeling, analysis, simulation, scheduling, and control of semiconductor manufacturing systems: A Petri net approach

MC Zhou - IEEE Transactions on Semiconductor Manufacturing, 1998 - ieeexplore.ieee.org
This paper presents a Petri net approach to modeling, analysis, simulation, scheduling, and
control of semiconductor manufacturing systems. These systems can be characterized as …

[图书][B] Performance analysis and optimization of asynchronous circuits

SM Burns - 1991 - search.proquest.com
Analytical techniques are developed to determine the performance of asynchronous digital
circuits. These techniques can be used to guide the designer during the synthesis of such a …

Faster maximum and minimum mean cycle algorithms for system-performance analysis

A Dasdan, RK Gupta - … on computer-aided design of integrated …, 1998 - ieeexplore.ieee.org
Maximum and minimum mean cycle problems are important problems with many
applications in performance analysis of synchronous and asynchronous digital systems …

The impact of electronic commerce on the travel industry an analysis methodology and case study

M Bloch, A Segev - Proceedings of the Thirtieth Hawaii …, 1997 - ieeexplore.ieee.org
We introduce an approach to analyzing the impact of electronic commerce on an industry,
and describe how industry players can devise plans to take advantage of new business …

Energy reduction in a pallet-constrained flow shop through on–off control of idle machines

M Mashaei, B Lennartson - IEEE Transactions on Automation …, 2012 - ieeexplore.ieee.org
For flexible manufacturing systems, there are normally some durations in which a number of
machines are idle and do not process any parts. Devising a control policy to turn off the idle …

[PDF][PDF] Properties and performance bounds for timed marked graphs

J Campos, G Chiola, JM Colom… - IEEE Transactions on …, 1992 - researchgate.net
A class of synchronized queueing networks with deterninistic routing is identified to be
equivalent to a subclass of timed Petri nets called marked graphs. First some structural and …

[PDF][PDF] Robotic

D FreeDman - 1991 - gwu.edu
18 GWRESEARCH • f A ll 2 0 1 2 Page 1 18 GWRESEARCH • f A ll 2 0 1 2 Page 2
GWRESEARCH • f A ll 2 0 1 2 19 By Danny FreeDman | photography By Jessica mcconnell Burt …

Slack matching asynchronous designs

PA Beerel, A Lines, M Davies… - 12th IEEE International …, 2006 - ieeexplore.ieee.org
Slack matching is the problem of adding pipeline buffers to an asynchronous pipelined
design in order to prevent stalls and improve performance. This paper addresses the …

Compositional system-level design exploration with planning of high-level synthesis

HY Liu, M Petracca, LP Carloni - 2012 Design, Automation & …, 2012 - ieeexplore.ieee.org
The growing complexity of System-on-Chip (SoC) design calls for an increased usage of
transaction-level modeling (TLM), high-level synthesis tools, and reuse of pre-designed …