[图书][B] VLSI test principles and architectures: design for testability
This book is a comprehensive guide to new DFT methods that will show the readers how to
design a testable and quality product, drive down test cost, improve product quality and …
design a testable and quality product, drive down test cost, improve product quality and …
[图书][B] Electronic design automation: synthesis, verification, and test
This book provides broad and comprehensive coverage of the entire EDA flow. EDA/VLSI
practitioners and researchers in need of fluency in an" adjacent" field will find this an …
practitioners and researchers in need of fluency in an" adjacent" field will find this an …
Immunotronics-novel finite-state-machine architectures with built-in self-test using self-nonself differentiation
DW Bradley, AM Tyrrell - IEEE Transactions on Evolutionary …, 2002 - ieeexplore.ieee.org
A novel approach to hardware fault tolerance is demonstrated that takes inspiration from the
human immune system as a method of fault detection. The human immune system is a …
human immune system as a method of fault detection. The human immune system is a …
Low power signal processing architectures for network microsensors
MJ Dong, KG Yung, WJ Kaiser - … of the 1997 international symposium on …, 1997 - dl.acm.org
Low power signal processing systems are required for distributed network microsensor
technology. Network microsensors now provide a new monitoring and control capability for …
technology. Network microsensors now provide a new monitoring and control capability for …
Sequential circuit test generation using dynamic state traversal
A new method for state justification is proposed for sequential circuit test generation. The
linear list of states dynamically obtained during the derivation of test vectors is used to guide …
linear list of states dynamically obtained during the derivation of test vectors is used to guide …
A genetic algorithm framework for test generation
EM Rudnick, JH Patel, GS Greenstein… - … on computer-aided …, 1997 - ieeexplore.ieee.org
Test generation using deterministic fault-oriented algorithms is highly complex and time
consuming. New approaches are needed to augment the existing techniques, both to …
consuming. New approaches are needed to augment the existing techniques, both to …
Genetic algorithm based software testing
GD Smith, NC Steele, RF Albrecht, JT Alander… - Artificial Neural Nets and …, 1998 - Springer
In this work we axe studying possibilities to test software using genetic algorithm search. The
idea is to produce test cases in order to find problematic situations like processing time …
idea is to produce test cases in order to find problematic situations like processing time …
Fast algorithms for static compaction of sequential circuit test vectors
MS Nsiao, EM Rudnick, JH Patel - Proceedings. 15th IEEE …, 1997 - ieeexplore.ieee.org
Two fast algorithms for static test sequence compaction are proposed for sequential circuits.
The algorithms are based on the observation that test sequences traverse through a small …
The algorithms are based on the observation that test sequences traverse through a small …
[PDF][PDF] Peak power estimation using genetic spot optimization for large VLSI circuits
MS Hsiao - Proceedings of the conference on Design, automation …, 1999 - dl.acm.org
Estimating peak power involves optimization of the circuit's switching function. We propose
genetic spot expansion and optimization in this paper to estimate tight peak power bounds …
genetic spot expansion and optimization in this paper to estimate tight peak power bounds …
The agile approach in an undergraduate software engineering course project
T Reichlmayr - 33rd Annual Frontiers in Education, 2003. FIE …, 2003 - ieeexplore.ieee.org
The rise in popularity of agile software development methodologies such as extreme
programming (XP), crystal, DSDM and feature-driven development has opened an …
programming (XP), crystal, DSDM and feature-driven development has opened an …