Similar to phase-locked loops, frequency-locked loops (FLLs) are useful in many
applications involving waveform synchronization or synthesis. Simple logic circuit-based …

This paper presents a near-threshold low-power all-digital PLL (ADPLL). It includes a 9-bit
bootstrapped DCO (BDCO) to reduce supply voltage and power consumption, a weighted …

Ultra low power dissipation is essential in retinal prosthesis and many other biomedical
implants. Extensive research has been undertaken in designing low power biomedical …

Duty-cycled low-rate Internet-of-things (IoT) sensors are employed in diverse applications,
requiring configurable and energy-efficient on-chip and on-demand clock synthesis. We …

Time-average-frequency (TAF) is a novel concept proposed in 2008 for constructing clock
signal. TAF direct period synthesis (TAF-DPS) is an emerging frequency synthesis technique …

We experimentally demonstrate all-optical phase-sensitive quantization of a 10–20 Gbaud
quadrature phase-shift keying (QPSK) signal's phase without an active phase-locked loop …

The microwave community has recently seen a large increase in the research being done
pertaining to medical applications. A few example applications include• remote patient …

A highly digital two-stage fractional-N phaselocked loop (PLL) architecture utilizing a first-
order 1-bit ΔΣ frequency-to-digital converter (FDC) is proposed and implemented in a 65nm …

A CMOS low-power transceiver for implantable and external health monitoring devices
operating in the MICS band is presented. The LNA core has an integrated mixer in a folded …

A digital fractional-N phase-locked loop (PLL) frequency synthesizer based on a second-
order ΔΣ frequency-to-digital converter (FDC) without conventional analog components was …