Power reduction techniques for LDPC decoders

A Darabiha, AC Carusone… - IEEE Journal of Solid …, 2008 - ieeexplore.ieee.org
This paper investigates VLSI architectures for low-density parity-check (LDPC) decoders
amenable to low-voltage and low-power operation. First, a highly-parallel decoder …

On-line hand-eye calibration

N Andreff, R Horaud, B Espiau - … on 3-D Digital Imaging and …, 1999 - ieeexplore.ieee.org
We address the problem of hand-eye calibration of a robot mounted video camera. We
derive a new linear formulation of the problem. This allows an algebraic analysis of the …

The episolar constraint: Monocular shape from shadow correspondence

A Abrams, K Miskell, R Pless - … of the IEEE conference on computer …, 2013 - cv-foundation.org
Shadows encode a powerful geometric cue: if one pixel casts a shadow onto another, then
the two pixels are colinear with the lighting direction. Given many images over many lighting …

The next generation challenge for software defined radio

M Woh, S Seo, H Lee, Y Lin, S Mahlke, T Mudge… - … , and Simulation: 7th …, 2007 - Springer
Wireless communication for mobile terminals has been a high performance computing
challenge. It requires almost super computer performance while consuming very little power …

A 285-MHz Pipelined MAP Decoder in 0.18-/spl mu/m CMOS

SJ Lee, NR Shanbhag… - IEEE Journal of Solid-State …, 2005 - ieeexplore.ieee.org
Presented in this paper is a pipelined 285-MHz maximum a posteriori probability (MAP)
decoder IC. The 8.7-mm/sup 2/IC is implemented in a 1.8-V 0.18-/spl mu/m CMOS …

High speed max-log-MAP turbo SISO decoder implementation using branch metric normalization

JH Han, AT Erdogan, T Arslan - … on VLSI: New Frontiers in VLSI …, 2005 - ieeexplore.ieee.org
The authors present a turbo soft-in soft-out (SISO) decoder based on max-log maximum a
posteriori (ML-MAP) algorithm implemented with sliding window (SW) method. A novel …

Low-power hybrid turbo decoding based on reverse calculation

HM Choi, JH Kim, IC Park - IEICE transactions on fundamentals of …, 2006 - search.ieice.org
As turbo decoding is a highly memory-intensive algorithm consuming large power, a major
issue to be solved in practical implementation is to reduce power consumption. This paper …

[PDF][PDF] Low-power log-MAP decoding based on reduced metric memory access

DS Lee, IC Park - IEEE Transactions on Circuits and Systems I: Regular …, 2006 - Citeseer
Due to the powerful error correcting performance, turbo codes have been adopted in many
wireless communication standards such as W-CDMA and CDMA2000. Although several low …

[PDF][PDF] A baseband processor for software defined radio terminals

H Lee - 2007 - tnm.engin.umich.edu
In the near future, we will use intelligent devices that include the functionalities of most hand
held devices such as tablet computers, cellular phones, MP3 players, game consoles, etc …

A low complexity stopping criterion for reducing power consumption in turbo decoders

P Reddy, F Clermidy, A Baghdadi… - … Design, Automation & …, 2011 - ieeexplore.ieee.org
Turbo codes are proposed in most of the advanced digital communication standards, such
as 3GPP-LTE. However, due to its computational complexity, the turbo decoder is one of the …