On the interaction between power-aware FPGA CAD algorithms

J Lamoureux, SJE Wilton - ICCAD-2003. International …, 2003 - ieeexplore.ieee.org
As Field-Programmable Gate Array (FPGA) power consumption continues to increase, lower
power FPGA circuitry, architectures, and Computer-Aided Design (CAD) tools need to be …

Power estimation techniques for FPGAs

JH Anderson, FN Najm - … on Very Large Scale Integration (VLSI …, 2004 - ieeexplore.ieee.org
The dynamic power consumed by a digital CMOS circuit is directly proportional to both
switching activity and interconnect capacitance. In this paper, we consider early prediction of …

Power-aware technology mapping for LUT-based FPGAs

JH Anderson, FN Najm - 2002 IEEE International Conference …, 2002 - ieeexplore.ieee.org
We present a new power-aware technology mapping technique for LUT-based FPGAs
which aims to keep nets with high switching activity out of the FPGA routing network and …

Heterogeneous FPGA architecture using threshold logic gates for improved area, power, and performance

A Wagle, S Vrudhula - … on Computer-Aided Design of Integrated …, 2021 - ieeexplore.ieee.org
The flexibility of field-programmable gate arrays (FPGAs) is attributed to the reconfigurability
of their basic logic elements (BLEs). Traditionally, the BLEs are comprised of one or more …

Power estimation for field programmable gate arrays

KKW Poon - 2002 - open.library.ubc.ca
Power dissipation is becoming a major concern for semiconductor vendors and customers.
Compared to ASICs and other custom chips, Field Programmable Gate Arrays (FPGAs) have …

On the interaction between power-aware computer-aided design algorithms for field-programmable gate arrays

J Lamoureux, SJE Wilton - Journal of Low Power Electronics, 2005 - ingentaconnect.com
As Field Programmable Gate Array (FPGA) power consumption continues to increase, lower
power FPGA circuitry, architectures, and Computer-Aided Design (CAD) tools need to be …

Power-aware FPGA logic synthesis using binary decision diagrams

KO Tinmaung, D Howland, R Tessier - … of the 2007 ACM/SIGDA 15th …, 2007 - dl.acm.org
Power consumption in field programmable gate arrays (FPGAs) has become an important
issue as the FPGA market has grown to include mobile platforms. In this work we present a …

Switching activity analysis and pre-layout activity prediction for FPGAs

JH Anderson, FN Najm - Proceedings of the 2003 international workshop …, 2003 - dl.acm.org
It is well-known that dynamic power dissipation in digital CMOS circuits depends linearly on
switching activity. In this paper, we study switching activity in a commercial FPGA and …

Interconnect capacitance estimation for FPGAs

JH Anderson, FN Najm - ASP-DAC 2004: Asia and South …, 2004 - ieeexplore.ieee.org
The dynamic power consumed by a digital CMOS circuit is directly proportional to
capacitance. In this paper, we consider pre-routing capacitance estimation for FPGAs and …

[PDF][PDF] Exploiting DSP block capabilities in FPGA high level design flows

R Bajaj - Nanyang Technological University, Singapore, 2016 - warwick.ac.uk
Field Programmable Gate Arrays (FPGAs) are pre-fabricated silicon devices that can be
electrically programmed to become almost any kind of digital circuit or system [1]. FPGAs are …