Asynchronous design—Part 1: Overview and recent advances
SM Nowick, M Singh - IEEE Design & Test, 2015 - ieeexplore.ieee.org
An asynchronous design paradigm is capable of addressing the impact of increased
process variability, power and thermal bottlenecks, high fault rates, aging, and scalability …
process variability, power and thermal bottlenecks, high fault rates, aging, and scalability …
[图书][B] Asynchronous circuit design
CJ Myers - 2001 - books.google.com
With asynchronous circuit design becoming a powerful tool in the development of new
digital systems, circuit designers are expected to have asynchronous design skills and be …
digital systems, circuit designers are expected to have asynchronous design skills and be …
[图书][B] Logic synthesis for asynchronous controllers and interfaces
J Cortadella, M Kishinevsky, A Kondratyev, L Lavagno… - 2012 - books.google.com
This book is the result of a long friendship, of a broad international co operation, and of a
bold dream. It is the summary of work carried out by the authors, and several other wonderful …
bold dream. It is the summary of work carried out by the authors, and several other wonderful …
Relative timing [asynchronous design]
KS Stevens, R Ginosar, S Rotem - IEEE Transactions on Very …, 2003 - ieeexplore.ieee.org
Relative timing (RT) is introduced as a method for asynchronous design. Timing
requirements of a circuit are made explicit using relative timing. Timing can be directly …
requirements of a circuit are made explicit using relative timing. Timing can be directly …
Asynchronous floating-point adders and communication protocols: A survey
Addition is the key operation in digital systems, and floating-point adder (FPA) is frequently
used for real number addition because floating-point representation provides a large …
used for real number addition because floating-point representation provides a large …
Theory and circuit modeling of baseband and modulated signal delay compensations with low-and band-pass NGD effects
With the increase of the electrical interconnect network complexity, the signal integrity (SI)
analysis becomes crucial for the electronic RF and mixed circuit designer. Approximated …
analysis becomes crucial for the electronic RF and mixed circuit designer. Approximated …
High-speed QDI asynchronous pipelines
RO Ozdag, PA Beerel - Proceedings Eighth International …, 2002 - ieeexplore.ieee.org
This paper introduces two new high-speed quasi delay insensitive (QDI) asynchronous
pipeline templates. These new high throughput templates support complex non-linear …
pipeline templates. These new high throughput templates support complex non-linear …
Characterization of asynchronous templates for integration into clocked CAD flows
KS Stevens, Y Xu, V Vij - 2009 15th IEEE Symposium on …, 2009 - ieeexplore.ieee.org
Asynchronous circuit design can result in substantial benefits of reduced power, improved
performance, and high modularity. However, asynchronous design styles are largely …
performance, and high modularity. However, asynchronous design styles are largely …
Toward a multiple clock/voltage island design style for power-aware processors
E Talpes, D Marculescu - … on Very Large Scale Integration (VLSI …, 2005 - ieeexplore.ieee.org
Enabled by the continuous advancement in fabrication technology, present-day
synchronous microprocessors include more than 100 million transistors and have clock …
synchronous microprocessors include more than 100 million transistors and have clock …
Energy-efficient synchronous-logic and asynchronous-logic FFT/IFFT processors
Two 128-point 16-bit radix-2 FFT/IFFT processors based on synchronous-logic (sync) and
asynchronous-logic (async) for low voltage (1.1-1.4 V) energy-critical low-speed hearing …
asynchronous-logic (async) for low voltage (1.1-1.4 V) energy-critical low-speed hearing …