A low-power rail-to-rail input-range linear delay element circuit

H Rivandi, S Ebrahimi, M Saberi - AEU-International Journal of Electronics …, 2017 - Elsevier
Delay elements are one of the key components in many time-domain circuits such as time-
based analog-to-digital converters. In this paper, a new rail-to-rail current-starved delay …

Programmable Delay Element using Dual-Port FeFET for Post-Silicon Clock Tuning

S Chatterjee, YS Chauhan… - IEEE Electron Device …, 2023 - ieeexplore.ieee.org
The discovery of ferroelectricity in doped HfO2 has led to its widespread use in various
applications, including embedded non-volatile memories and deep learning acceleration …

A fine-grained, uniform, energy-efficient delay element for FD-SOI technologies

A Singhvi, MT Moreira, RN Tadros… - 2015 IEEE Computer …, 2015 - ieeexplore.ieee.org
Contemporary digitally controlled delay elements trade off power overheads and delay
quantization error. This paper proposes a new delay element that provides a balanced …

Synthesis of all-digital delay lines

A Moreno, J Cortadella - 2017 23rd IEEE international …, 2017 - ieeexplore.ieee.org
The synthesis of delay lines (DLs) is a core task during the generation of matched delays,
ring oscillator clocks or delay monitors. The main figure of merit of a DL is the fidelity to track …

A 0.5 V modified pseudo-differential current-starved ring-VCO with linearity improvement for IoT devices

P Srikram, P Ambalathankandy… - 2023 International …, 2023 - ieeexplore.ieee.org
Ring-VCO (Voltage controlled oscillator)-based ADCs are suitable for data acquisition in IoT
devices due to simple delay elements configuration in the chain. The future development of …

Analysis and design of delay lines for dynamic voltage scaling applications

RN Tadros, W Hua, M Gibiluka… - 2016 22nd IEEE …, 2016 - ieeexplore.ieee.org
Dynamic voltage scaling of bundled-data asynchronous design has the promise to lead to
far more energy efficient systems than traditionally clocked alternatives. However, this …

Complementary Voltage to Time Converter With Optimized Voltage Scaling Circuit

BW Shih, YC Chen, JY Lee… - IEEE Transactions on Very …, 2024 - ieeexplore.ieee.org
Delay lines often face challenges due to input–output nonlinearity and excessive voltage-to-
time gain, leading to inaccurate voltage indications and a limited input voltage range. This …

[PDF][PDF] Robust and energy-efficient hardware: the case for asynchronous design

NLV Calazans, TA Rodolfo… - JICS. JOURNAL OF …, 2021 - meriva.pucrs.br
Current technologies behind the design of semiconductor integrated circuits allow
embedding components in the order of billions in a singe die. This enables the construction …

Asynchronous circuits: innovations in components, cell libraries and design templates

MT Moreira - 2016 - meriva.pucrs.br
For decades now, the synchronous paradigm has been the major choice of the industry for
building integrated circuits. Unfortunately, with the development of semiconductor industry …

Asynchronous Circuit Principles and a Survey of Associated Design Tools

NLV Calazans, M Sartori - Journal of Integrated Circuits and Systems, 2022 - jics.org.br
Planning and implementing a semiconductor integrated circuit is a highly complex process.
Although physical limits seem to be approaching, it currently follows a growing evolutionary …