A survey of computer architecture simulation techniques and tools

A Akram, L Sawalha - Ieee Access, 2019 - ieeexplore.ieee.org
Computer architecture simulators play an important role in advancing computer architecture
research. With wider research directions and the increased number of simulators that have …

Field programmable gate array applications—A scientometric review

J Ruiz-Rosero, G Ramirez-Gonzalez, R Khanna - Computation, 2019 - mdpi.com
Field Programmable Gate Array (FPGA) is a general purpose programmable logic device
that can be configured by a customer after manufacturing to perform from a simple logic gate …

FireSim: FPGA-accelerated cycle-exact scale-out system simulation in the public cloud

S Karandikar, H Mao, D Kim, D Biancolin… - 2018 ACM/IEEE 45th …, 2018 - ieeexplore.ieee.org
We present FireSim, an open-source simulation platform that enables cycle-exact
microarchitectural simulation of large scale-out clusters by combining FPGA-accelerated …

ZSim: Fast and accurate microarchitectural simulation of thousand-core systems

D Sanchez, C Kozyrakis - ACM SIGARCH Computer architecture news, 2013 - dl.acm.org
Architectural simulation is time-consuming, and the trend towards hundreds of cores is
making sequential simulation even slower. Existing parallel simulation techniques either …

Sniper: Exploring the level of abstraction for scalable and accurate parallel multi-core simulation

TE Carlson, W Heirman, L Eeckhout - Proceedings of 2011 International …, 2011 - dl.acm.org
Two major trends in high-performance computing, namely, larger numbers of cores and the
growing size of on-chip cache memory, are creating significant challenges for evaluating the …

An evaluation of high-level mechanistic core models

TE Carlson, W Heirman, S Eyerman, I Hur… - ACM Transactions on …, 2014 - dl.acm.org
Large core counts and complex cache hierarchies are increasing the burden placed on
commonly used simulation and modeling techniques. Although analytical models provide …

Programming heterogeneous systems from an image processing DSL

J Pu, S Bell, X Yang, J Setter, S Richardson… - ACM Transactions on …, 2017 - dl.acm.org
Specialized image processing accelerators are necessary to deliver the performance and
energy efficiency required by important applications in computer vision, computational …

DS3: A system-level domain-specific system-on-chip simulation framework

SE Arda, A Krishnakumar, AA Goksoy… - IEEE Transactions …, 2020 - ieeexplore.ieee.org
Heterogeneous systems-on-chip (SoCs) are highly favorable computing platforms due to
their superior performance and energy efficiency potential compared to homogeneous …

Predictive modeling for CPU, GPU, and FPGA performance and power consumption: A survey

K O'Neal, P Brisk - … Society Annual Symposium on VLSI (ISVLSI …, 2018 - ieeexplore.ieee.org
CPUs and dedicated accelerators (namely GPUs and FPGAs) continue to grow increasingly
large and complex to support todays demanding performance and power requirements …

DART: A programmable architecture for NoC simulation on FPGAs

D Wang, NE Jerger, JG Steffan - Proceedings of the Fifth ACM/IEEE …, 2011 - dl.acm.org
The increased demand for on-chip communication bandwidth as a result of the multi-core
trend has made networks on-chip (NoCs) a compelling choice for the communication …