Hardware prefetching is one of the common off-chip DRAM latency hiding techniques.
Though hardware prefetchers are ubiquitous in the commercial machines and prefetching …

Hardware prefetching is a latency-hiding technique that hides the costly off-chip DRAM
accesses. However, state-of-the-art prefetchers fail to deliver performance improvement in …

Online Reinforcement Learning (RL) has been adopted as an effective mechanism in
various decision-making problems in microarchitecture. Its high adaptability and the ability to …

Data prefetching is a technique that plays a crucial role in modern high-performance
processors by hiding long latency memory accesses. Several state-of-the-art hardware …

We aim to reduce contention caused by multiple aggressive prefetchers on shared
resources (eg, LLC and memory bandwidth) with a multi-agent reinforcement learning …

Over the years, processor throughput has steadily increased. However, the memory
throughput has not increased at the same rate, which has led to the memory wall problem in …

Modern computer designs support composite prefetching, where multiple individual
prefetcher components are used to target different memory access patterns. However …

Data prefetching efficiently reduces the memory access latency in NUCA architectures as
the Last Level Cache (LLC) is shared and distributed across multiple cores. But cache …

Cache prefetching is a traditional way to reduce memory access latency. In multi-core
systems, aggressive prefetching may harm the system. In the past, prefetching throttling …

Hardware prefetching and replacement policies are two techniques to improve the
performance of the memory subsystem. While prefetching hides memory latency and …