Area and power optimization for Fixed Polarity Reed–Muller logic circuits based on Multi-strategy Multi-objective Artificial Bee Colony algorithm

D Qin, Z He, X Zhao, J Liu, F Zhang, L Xiao - Engineering Applications of …, 2023 - Elsevier
Area and power optimization of Fixed Polarity Reed–Muller (FPRM) circuits has received a
lot of attention. Polarity optimization for FPRM circuits is essentially a binary multi-objective …

Area optimization for MPRM logic circuits based on improved multiple disturbances fireworks algorithm

Z He, Y Pan, K Wang, L Xiao, X Wang - Applied Mathematics and …, 2021 - Elsevier
Area optimization is one of the most important contents of circuit logic synthesis. In logical
function expressions, mixed polarity Reed–Muller (MPRM) expansion produces a smaller …

Fast minimization of fixed polarity Reed-Muller expressions

Z He, L Xiao, Z Huo, T Wang, X Wang - IEEE Access, 2019 - ieeexplore.ieee.org
Logic minimization has recently attracted significant attention because in many applications
it is important to have a compact representation as possible. In this paper, we propose a fast …

A polarity optimization algorithm taking into account polarity conversion sequence

Z He, J Liu, L Xiao, Z Huo, X Wang - IEEE Access, 2019 - ieeexplore.ieee.org
The polarity conversion sequence directly determines polarity conversion efficiency and
then affects polarity optimization efficiency. However, few studies have focused on the …

An Effective Power Optimization Approach Based on Whale Optimization Algorithm with Two-Populations and Mutation Strategies

J He, Z He, J Liu, Y Zhang, F Zhang… - Chinese Journal of …, 2024 - ieeexplore.ieee.org
Power is an issue that must be considered in the design of logic circuits. Power optimization
is a combinatorial optimization problem, since it is necessary to search for a logical …