CKV (fy) operative to select one of the plurality of phases. A phase detection circuit is
coupled to the switch and is operable to receive a selected phase and to provide digital …

In the last few years, several digital implementations of phase-locked loops (PLLs) have
emerged, in some cases outperforming analog ones. Some of these PLLs use a bang-bang …

Nonlinearities in the time-to-digital converter (TDC) are a significant source of fractional
spurs in a divider-less fractional-N ADPLL. Using an abstract model for the TDC, this paper …

The past several years have successfully brought all-digital techniques to the RF frequency
synthesis, which could arguably be considered one of the last strong bastions of the …

We propose a new multirate architecture of an all-digital PLL (ADPLL) featuring
phase/frequency modulation capability. While the ADPLL approach has already proven its …

This paper proposes a fractional-N digital phase-locked loop (DPLL) architecture with
feedforward multi-tone spur cancellation scheme. The proposed cancellation loop is …

A 77-GHz frequency-modulated continuous-wave (FMCW) generator is presented for
millimeter-wave (mm-wave) radar applications. The FMCW chirp is provided by a …

An embodiment of the present invention provides a phase locked loop that operates on
clock signals derived from an RF clock signal generated by the phase locked loop. A …

A novel and useful apparatus for and method of improving the quantization resolution of a
time to digital converter in a digital PLL using noise shaping. The TDC quantization noise …

This paper proposes a fractional-N digital phase locked loop (DPLL) architecture with
calibration-free multi-phase injection-locked time-to-digital converter (TDC) and gradient …