Stacked nanosheet field-effect transistor with air gap spacers

J Frougier, R Xie, H Zang, K Cheng… - US Patent …, 2019 - Google Patents
Structures for a nanosheet field-effect transistor and methods for forming a structure for a
nanosheet field-effect transistor. A fin is formed that includes a first nanosheet channel layer …

Gate-all-around field-effect transistor devices having source/drain extension contacts to channel layers for reduced parasitic resistance

K Cheng, Y Song, Z Bi - US Patent 10,832,907, 2020 - Google Patents
Devices and methods are provided for fabricating field-effect transistors having source/drain
extension contacts to provide reduced parasitic resistance in electrical paths between …

Semiconductor devices

CW Noh, MG Kang, GJ Bae, DI Bae, JG Yang… - US Patent …, 2021 - Google Patents
Semiconductor devices are provided. The semiconductor devices may include a first wire
pattern extending in a first direction on a substrate and a second wire pattern on the first wire …

Tight pitch stack nanowire isolation

E Leobandung - US Patent 10,418,493, 2019 - Google Patents
Devices and methods for forming a tight pitch stack nanowire without shallow trench
isolation including a base nanosheet formed on a substrate. At least one fin are formed, and …

Nanosheet transistor with stable structure

K Cheng - US Patent 10,680,107, 2020 - Google Patents
Sacrificial gate structures are simultaneously formed in an isolation region that are wider
than the sacrificial gate structures formed in the active region. The wider sacrificial gate …

Nanosheet bottom isolation and source or drain epitaxial growth

R Xie, V Basker, N Loubet… - US Patent …, 2021 - Google Patents
Embodiments of the present invention are directed to a method that prevents punch-through
of a bottom isolation layer and improves the quality of the source/drain epitaxial growth in a …

Nanosheet transistor having improved bottom isolation

R Xie, K Cheng, CC Yeh - US Patent 10,840,329, 2020 - Google Patents
Embodiments of the invention are directed to a method that includes forming a first sacrificial
nanosheet over a substrate and forming a first nanosheet stack over the first sacrificial …

Waveguides with multiple airgaps arranged in and over a silicon-on-insulator substrate

SM Shank, SP Adusumilli - US Patent 10,156,676, 2018 - Google Patents
Waveguide structures and methods of fabricating waveguide structures. The waveguide
structures are formed using a semiconductor substrate that includes a device layer, a handle …

Source and drain epitaxy and isolation for gate structures

K Cheng, J Li, P Xu, Z Bi - US Patent 10,985,279, 2021 - Google Patents
Semiconductor devices and methods for forming the semi conductor devices include forming
a sacrificial layer on a substrate on each side of a stack of nanosheets, the stack of …

Dielectric isolation for nanosheet devices

K Cheng, R Xie, T Yamashita, CC Yeh - US Patent 11,062,937, 2021 - Google Patents
A technique relates to a semiconductor device. A stack is formed over a bottom sacrificial
layer, and the bottom sacrificial layer is on a substrate. The bottom sacrificial layer is …