Assessing the analog/RF and linearity performances of FinFET using high threshold voltage techniques
One of the severe issues of the downscaling of semiconductor devices is the threshold
voltage reduction which significantly increases the leakage current. Thus, high threshold …
voltage reduction which significantly increases the leakage current. Thus, high threshold …
Substrate BOX engineering to mitigate the self-heating induced degradation in nanosheet transistor
The continued scaling of 3D transistors into the ultra-scaled-down nanoscale regime causes
self-heating effect (SHE) driven thermal deterioration. Particularly in silicon-on-insulator …
self-heating effect (SHE) driven thermal deterioration. Particularly in silicon-on-insulator …
Investigating the impact of self-heating effects on some thermal and electrical characteristics of dielectric pocket gate-all-around (DPGAA) MOSFETs
The dielectric pocket gate-all-around (DPGAA) MOSFET is being considered the best suited
candidate for ULSI electronic chips because of excellent electrostatic control over the …
candidate for ULSI electronic chips because of excellent electrostatic control over the …
Through-silicon-via induced stress-aware FinFET buffer sizing in 3D ICs
In order to keep up with scaling trends, significant efforts are being undertaken in the
direction of vertical stacking of integrated circuits. With advancements in packaging …
direction of vertical stacking of integrated circuits. With advancements in packaging …