Statistical fault injection for impact-evaluation of timing errors on application performance
This paper proposes a novel approach to modeling of gate level timing errors during high-
level instruction set simulation. In contrast to conventional, purely random fault injection, our …
level instruction set simulation. In contrast to conventional, purely random fault injection, our …
A comprehensive soft error analysis methodology for SoCs/ASICs memory instances
D Alexandrescu - 2011 IEEE 17th International On-Line …, 2011 - ieeexplore.ieee.org
Memory blocks are important features of any design, in terms of functionality, silicon area
and reliability. Embedded SRAM instances are critical contributors to the overall Soft Error …
and reliability. Embedded SRAM instances are critical contributors to the overall Soft Error …
Fast reliability exploration for embedded processors via high-level fault injection
The downscaling of technology features has brought the system developers an important
design criteria, reliability, into prime consideration. Due to effects like external radiation and …
design criteria, reliability, into prime consideration. Due to effects like external radiation and …
Task scheduling for reliable cache architectures of multiprocessor systems
M Sugihara, T Ishihara… - 2007 Design, Automation …, 2007 - ieeexplore.ieee.org
This paper presents a task scheduling method for reliable cache architectures (RCAs) of
multiprocessor systems. The RCAs dynamically switch their operation modes for reducing …
multiprocessor systems. The RCAs dynamically switch their operation modes for reducing …
A cost-effective dependable microcontroller architecture with instruction-level rollback for soft error recovery
T Sakata, T Hirotsu, H Yamada… - 37th Annual IEEE/IFIP …, 2007 - ieeexplore.ieee.org
A cost-effective, dependable microcontroller architecture has been developed. To detect soft
errors, we developed an electronic design automation (EDA) tool that generates optimized …
errors, we developed an electronic design automation (EDA) tool that generates optimized …
Reliability inherent in heterogeneous multiprocessor systems and task scheduling for ameliorating their reliability
M Sugihara - IEICE transactions on fundamentals of electronics …, 2009 - search.ieice.org
Utilizing a heterogeneous multiprocessor system has become a popular design paradigm to
build an embedded system at a cheap cost within short development time. A reliability issue …
build an embedded system at a cheap cost within short development time. A reliability issue …
Accurate and efficient reliability estimation techniques during ADL-driven embedded processor design
The downscaling of technology features has brought the system developers an important
design criteria, reliability, into prime consideration. Due to external radiation effects and …
design criteria, reliability, into prime consideration. Due to external radiation effects and …
SEU vulnerability of multiprocessor systems and task scheduling for heterogeneous multiprocessor systems
M Sugihara - 9th International Symposium on Quality Electronic …, 2008 - ieeexplore.ieee.org
Utilizing a heterogeneous multiprocessor system has become a popular design paradigm to
build an embedded system at a cheap cost within short development time. A reliability issue …
build an embedded system at a cheap cost within short development time. A reliability issue …
Reliable cache architectures and task scheduling for multiprocessor systems
This paper proposes a task scheduling approach for reliable cache architectures (RCAs) of
multiprocessor systems. The RCAs dynamically switch their operation modes for reducing …
multiprocessor systems. The RCAs dynamically switch their operation modes for reducing …
Heterogeneous multiprocessor synthesis under performance and reliability constraints
M Sugihara - 2009 12th Euromicro Conference on Digital …, 2009 - ieeexplore.ieee.org
Utilizing a heterogeneous multiprocessor system has become a popular design paradigm to
build an embedded system at a cheap cost. A reliability issue, which is vulnerability to single …
build an embedded system at a cheap cost. A reliability issue, which is vulnerability to single …