Short channel effects (SCEs) along with mobility degradation has a great impact on CMOS
technology below 100 nm. These effects can be overcome by using gate and channel …

Silicon nanowire (SiNW) structures are the essential foundations of the next generation
highly efficient and lowcost electronic devices because of their specific chemical, optical …

This work presents a novel three-channel Tree-FET optimized for superior DC and analog
performance metrics. The device structure features nanosheets with a width (NS WD) of 9 …

The influence of single-and double-k spacer structures on the performance of a negative-
capacitance fin field-effect transistor (NC-FinFET) is investigated in this work. Sentaurus …

In this paper, a simulation study of a novel structure of Double Gate Junctionless FET (DG-
JLFET) having Dielectric Pockets inside the channel region is being reported for the first …

In this paper, we lay out a simulation study of DC parameters for a hetero-dielectric
junctionless field transistor along with the best possible combination of high-k/low-k spacer …

This study observes the MOSFET's performance concerning several biomolecules for use as
a biosensor device. The double gate MOSFET with gate stack configuration has been …

In this paper, a triple metal gate high-k gate all around junctionless nanowire field-effect
transistor biotin biosensor has been developed to study the impact of different interface trap …

cardiovascular diseases (CVDs) are evolved as the general chronic diseases that create
major threats to the health of human beings. The ECG machine can be used to track the …

The design of CMOS circuits employing nanoscale MOSFETs has grown extremely complex
in recent years due to new obstacles such as mobility deterioration and short channel effects …