A fault tolerance technique for combinational circuits based on selective-transistor redundancy

AT Sheikh, AH El-Maleh, MES Elrabaa… - IEEE Transactions on …, 2016 - ieeexplore.ieee.org
With fabrication technology reaching nanolevels, systems are becoming more prone to
manufacturing defects with higher susceptibility to soft errors. This paper is focused on …

LEAP: Layout design through error-aware transistor positioning for soft-error resilient sequential cell design

HHK Lee, L Klas, B Mounaim… - 2010 IEEE …, 2010 - ieeexplore.ieee.org
This paper presents a new layout design principle called LEAP which is an acronym for
Layout Design through Error-Aware Transistor Positioning. This principle extends beyond …

A bias-dependent single-event compact model implemented into BSIM4 and a 90 nm CMOS process design kit

JS Kauppila, AL Sternberg, ML Alles… - … on nuclear Science, 2009 - ieeexplore.ieee.org
A Bias-Dependent Single-Event Compact Model Implemented Into BSIM4 and a 90 nm
CMOS Process Design Kit Page 1 3152 IEEE TRANSACTIONS ON NUCLEAR SCIENCE …

Neutron-and proton-induced single event upsets for D-and DICE-flip/flop designs at a 40 nm technology node

TD Loveless, S Jagannathan, T Reece… - … on Nuclear Science, 2011 - ieeexplore.ieee.org
Neutron-and proton-induced single-event upset cross sections of D-and DICE-Flip/Flops are
analyzed for designs implemented in a 40 nm bulk technology node. Neutron and proton …

On the radiation-induced soft error performance of hardened sequential elements in advanced bulk CMOS technologies

N Seifert, V Ambrose, B Gill, Q Shi… - 2010 IEEE …, 2010 - ieeexplore.ieee.org
Test chips built in a 32 nm bulk CMOS technology consisting of hardened and non-
hardened sequential elements have been exposed to neutrons, protons, alpha-particles and …

Ionizing Radiation Effectsin Electronics

M Bagatin, S Gerardin - 2016 - api.taylorfrancis.com
There is an invisible enemy that constantly threatens the operation of electronics: ionizing
radiation. From sea level to outer space, ionizing radiation is virtually everywhere. At sea …

Fault simulation and emulation tools to augment radiation-hardness assurance testing

HM Quinn, DA Black, WH Robinson… - IEEE Transactions on …, 2013 - ieeexplore.ieee.org
As of 2013, the gold standard for assessing radiation-hardness assurance (RHA) for a
system, subsystem, or a component is accelerated radiation testing and/or pulsed laser …

Design of robust SRAM cells against single-event multiple effects for nanometer technologies

R Rajaei, B Asgari, M Tabandeh… - IEEE Transactions on …, 2015 - ieeexplore.ieee.org
As technology size scales down toward lower two-digit nanometer dimensions, sensitivity of
CMOS circuits to radiation effects increases. Static random access memory cells (SRAMs) …

Design and evaluation of low-complexity radiation hardened CMOS latch for double-node upset tolerance

J Guo, S Liu, L Zhu, F Lombardi - IEEE Transactions on Circuits …, 2020 - ieeexplore.ieee.org
Double-node upsets induced by the charge sharing effects are emerging as a major
reliability issue in nanometer latch design. Although the existing robust latches can provide …

Single event upset and multiple cell upset modeling in commercial bulk 65-nm CMOS SRAMs and flip-flops

S Uznanski, G Gasiot, P Roche… - … on Nuclear Science, 2010 - ieeexplore.ieee.org
A proprietary Monte-Carlo simulation code dedicated to heavy ion cross-section prediction
has been developed. The code is based on diffusion-collection equations, takes into …