[图书][B] VLSI test principles and architectures: design for testability

LT Wang, CW Wu, X Wen - 2006 - books.google.com
This book is a comprehensive guide to new DFT methods that will show the readers how to
design a testable and quality product, drive down test cost, improve product quality and …

LFSR-reseeding scheme achieving low-power dissipation during test

J Lee, NA Touba - IEEE transactions on computer-aided design …, 2007 - ieeexplore.ieee.org
This paper presents a new low-power test-data-compression scheme based on linear
feedback shift register (LFSR) reseeding. A drawback of compression schemes based on …

Scaled Euclidean 3D reconstruction based on externally uncalibrated cameras

Z Zhang, AR Hanson - Proceedings of International Symposium …, 1995 - ieeexplore.ieee.org
Previous work shows that based on five non-coplanar correspondences of two uncalibrated
cameras, 3D reconstruction can be achieved under projectile models, or based on four non …

A reconfigurable shared scan-in architecture

S Samaranayake, E Gizdarski… - … . 21st VLSI Test …, 2003 - ieeexplore.ieee.org
In this paper, an efficient technique for test data volume reduction based on the shared scan-
in (Illinois Scan) architecture and the scan chain reconfiguration (Dynamic Scan) …

Changing the scan enable during shift

N Sitchinava, E Gizdarski… - 22nd IEEE VLSI Test …, 2004 - ieeexplore.ieee.org
This paper extends the reconfigurable shared scan-in architecture (RSSA) to provide
additional ability to change values on the scan configuration signals (scan enable signals) …

Low power test data compression based on LFSR reseeding

J Lee, NA Touba - … Conference on Computer Design: VLSI in …, 2004 - ieeexplore.ieee.org
Many test data compression schemes are based on LFSR reseeding. A drawback of these
schemes is that the unspecified bits are filled with random values resulting in a large number …

Low-power scan testing: A scan chain partitioning and scan hold based technique

E Arvaniti, Y Tsiatouhas - Journal of Electronic Testing, 2014 - Springer
Power consumption during scan testing operations can be significantly higher than that
expected in the normal functional mode of operation in the field. This may affect the reliability …

Action recognition based on homography constraints

Y Shen, N Ashraf, H Foroosh - 2008 19th International …, 2008 - ieeexplore.ieee.org
In this paper, we present a new approach for view-invariant action recognition using
constraints derived from the eigenvalues of planar homographies associated with triplets of …

Combinatorial at-speed scan testing

AS Athavale, JR Ng - US Patent 7,266,743, 2007 - Google Patents
(Us) Samaranayake, S. et al.,“Dynamic Scan: Driving Down the Cost of Test,” IEEE, vol. 35,
N0. 10, Oct. 2002, pp. 63-68.(*) NOIiCeZ Subject IO any disclaimer, the term of this Neil …

Low power scan by partitioning and scan hold

E Arvaniti, Y Tsiatouhas - 2012 IEEE 15th International …, 2012 - ieeexplore.ieee.org
Scan testing dynamic power consumption can induce reliability problems in the circuit under
test (CUT) during manufacturing testing. In this paper, we propose a scan chain partitioning …