Bias temperature instability of mosfets: Physical processes, models, and prediction
CMOS technology dominates the semiconductor industry, and the reliability of MOSFETs is a
key issue. To optimize chip design, trade-offs between reliability, speed, power …
key issue. To optimize chip design, trade-offs between reliability, speed, power …
As-grown-generation (AG) model of NBTI: A shift from fitting test data to prediction
Negative bias temperature instabilities (NBTI) received little attention pre-2000, but have
been intensively investigated post-2000, as they become limiting device lifetime. The …
been intensively investigated post-2000, as they become limiting device lifetime. The …
Energy distribution of positive charges in gate dielectric: Probing technique and impacts of different defects
Positive charges (PCs) in gate dielectric shift the threshold voltage and cause a time-
dependent device variability. To assess their impact on circuits, it is useful to know their …
dependent device variability. To assess their impact on circuits, it is useful to know their …
A single pulse charge pumping technique for fast measurements of interface states
Characterizing interface states is a key task, and it typically takes seconds when
conventional techniques, such as charge pumping (CP), are used. The stress-induced …
conventional techniques, such as charge pumping (CP), are used. The stress-induced …
Negative bias temperature instability lifetime prediction: Problems and solutions
Lifetime of pMOSFETs is limited by NBTI. Conventional slow measurement overestimates
lifetime due to recovery. The fast techniques suppress recovery, but cannot give reliable …
lifetime due to recovery. The fast techniques suppress recovery, but cannot give reliable …
Defects and instabilities in Hf-dielectric/SiON stacks
JF Zhang - Microelectronic engineering, 2009 - Elsevier
In this work, a review on the recent progress in understanding defects and instabilities in Hf-
dielectric/SiON stacks will be given for both nMOSFETs and pMOSFETs. The key issues …
dielectric/SiON stacks will be given for both nMOSFETs and pMOSFETs. The key issues …
Development of a technique for characterizing bias temperature instability-induced device-to-device variation at SRAM-relevant conditions
SRAM is vulnerable to device-to-device variation (DDV), since it uses minimum-sized
devices and requires device matching. In addition to the as-fabricated DDV at time-zero …
devices and requires device matching. In addition to the as-fabricated DDV at time-zero …
Key issues and techniques for characterizing time-dependent device-to-device variation of SRAM
Discreteness of aging-induced charges causes a Time-dependent Device-to-Device
Variation (TDDV) and SRAM is vulnerable to it. This work analyses the shortcomings of …
Variation (TDDV) and SRAM is vulnerable to it. This work analyses the shortcomings of …
Trigger-When-Charged: A Technique for Directly Measuring RTN and BTI-Induced Threshold Voltage Fluctuation Under Use-
Low-power circuits are important for many applications, such as Internet of Things. Device
variations and fluctuations are challenging their design. Random telegraph noise (RTN) is …
variations and fluctuations are challenging their design. Random telegraph noise (RTN) is …
Single Pulse Charge Pumping Technique Improvement for Interface States Profiling in the Channel of MOSFET Devices
DE Messaoud, B Djezzar, M Boubaaya… - … on Device and …, 2023 - ieeexplore.ieee.org
This paper presents the separated single pulse charge pumping (SSPCP) technique, an
improvement over conventional single pulse charge pumping (CSPCP) for analyzing metal …
improvement over conventional single pulse charge pumping (CSPCP) for analyzing metal …