Scaling infrared detectors—status and outlook
A Rogalski - Reports on Progress in Physics, 2022 - iopscience.iop.org
The predicted'Law 19'benchmark for HgCdTe photodiode performance established in 2019
is a milestone in the development of infrared (IR) detectors and make the dream of Elliott …
is a milestone in the development of infrared (IR) detectors and make the dream of Elliott …
Design issues and considerations for low-cost 3-D TSV IC technology
G Van der Plas, P Limaye, I Loi… - IEEE Journal of Solid …, 2010 - ieeexplore.ieee.org
In this paper key design issues and considerations of a low-cost 3-D Cu-TSV technology are
investigated. The impact of TSV on BEOL interconnect reliability is limited, no failures have …
investigated. The impact of TSV on BEOL interconnect reliability is limited, no failures have …
Design and scaling of monocentric multiscale imagers
Monocentric multi-scale (MMS) lenses are a new approach to high-resolution wide-angle
imaging, where a monocentric objective lens is shared by an array of identical rotationally …
imaging, where a monocentric objective lens is shared by an array of identical rotationally …
7.1 A 1/4-inch 8Mpixel CMOS image sensor with 3D backside-illuminated 1.12 μm pixel with front-side deep-trench isolation and vertical transfer gate
JC Ahn, K Lee, Y Kim, H Jeong, B Kim… - … Solid-State Circuits …, 2014 - ieeexplore.ieee.org
According to the trend towards high-resolution CMOS image sensors, pixel sizes are
continuously shrinking, towards and below 1.0 μm, and sizes are now reaching a …
continuously shrinking, towards and below 1.0 μm, and sizes are now reaching a …
Test structures for characterization of through-silicon vias
M Stucchi, D Perry, G Katti, W Dehaene… - IEEE transactions on …, 2012 - ieeexplore.ieee.org
3-D chip stacking using through-silicon vias (TSVs) requires accurate characterization of the
TSV, the thinned silicon, and the stacked dies. This paper proposes a set of test structures …
TSV, the thinned silicon, and the stacked dies. This paper proposes a set of test structures …
Fully 3-D integrated pixel detectors for X-rays
GW Deptuch, G Carini, P Enquist… - … on Electron Devices, 2015 - ieeexplore.ieee.org
The vertically integrated photon imaging chip (VIPIC1) pixel detector is a stack consisting of
a 500-μm-thick silicon sensor, a two-tier 34-μm-thick integrated circuit, and a host printed …
a 500-μm-thick silicon sensor, a two-tier 34-μm-thick integrated circuit, and a host printed …
A low-power digitizer for back-illuminated 3-D-stacked CMOS image sensor readout with passing window and double auto-zeroing techniques
This paper presents a high-performance digitizer based on column-parallel single-slope
analog-to-digital converter (SS-ADC) topology for readout of a back-illuminated 3-D-stacked …
analog-to-digital converter (SS-ADC) topology for readout of a back-illuminated 3-D-stacked …
Semiconductor device and method for manufacturing same
T Hirano - US Patent 8,742,596, 2014 - Google Patents
Disclosed herein is a semiconductor device including: a first laminate having a wiring layer
formed on a substrate; a second laminate having a wiring layer formed on a substrate, a …
formed on a substrate; a second laminate having a wiring layer formed on a substrate, a …
[图书][B] 3D integration for VLSI systems
Three-dimensional (3D) integration is identified as a possible avenue for continuous
performance growth in integrated circuits (IC) as the conventional scaling approach is faced …
performance growth in integrated circuits (IC) as the conventional scaling approach is faced …
Physical design and CAD tools for 3-D integrated circuits: Challenges and opportunities
Three-dimensional integration is a breakthrough technology that provides numerous
benefits such as better performance, lower power consumption, and wide bandwidth by …
benefits such as better performance, lower power consumption, and wide bandwidth by …