A survey of research and practices of network-on-chip
T Bjerregaard, S Mahadevan - ACM Computing Surveys (CSUR), 2006 - dl.acm.org
The scaling of microchip technologies has enabled large scale systems-on-chip (SoC).
Network-on-chip (NoC) research addresses global communication in SoC, involving (i) a …
Network-on-chip (NoC) research addresses global communication in SoC, involving (i) a …
A survey on application mapping strategies for network-on-chip design
PK Sahu, S Chattopadhyay - Journal of systems architecture, 2013 - Elsevier
Application mapping is one of the most important dimensions in Network-on-Chip (NoC)
research. It maps the cores of the application to the routers of the NoC topology, affecting the …
research. It maps the cores of the application to the routers of the NoC topology, affecting the …
Adam: run-time agent-based distributed application mapping for on-chip communication
MA Al Faruque, R Krist, J Henkel - … of the 45th annual design automation …, 2008 - dl.acm.org
Design-time decisions can often only cover certain scenarios and fail in efficiency when hard-
to-predict system scenarios occur. This drives the development of run-time adaptive …
to-predict system scenarios occur. This drives the development of run-time adaptive …
Cluster-based simulated annealing for mapping cores onto 2D mesh networks on chip
In network-on-chip (NoC) application design, core-to-node mapping is an important but
intractable optimization problem. In the paper, we use simulated annealing to tackle the …
intractable optimization problem. In the paper, we use simulated annealing to tackle the …
Contention-aware application mapping for network-on-chip communication architectures
CL Chou, R Marculescu - 2008 IEEE international conference …, 2008 - ieeexplore.ieee.org
In this paper, we analyze the impact of network contention on the application mapping for tile-
based network-on-chip (NoC) architectures. Our main theoretical contribution consists of an …
based network-on-chip (NoC) architectures. Our main theoretical contribution consists of an …
Network-on-chip design and synthesis outlook
With the growing complexity in consumer embedded products, new tendencies forecast
heterogeneous Multi-Processor Systems-On-Chip (MPSoCs) consisting of complex …
heterogeneous Multi-Processor Systems-On-Chip (MPSoCs) consisting of complex …
[图书][B] Network-on-chip: the next generation of system-on-chip integration
S Kundu, S Chattopadhyay - 2014 - library.oapen.org
Addresses the Challenges Associated with System-on-Chip Integration Network-on-Chip:
The Next Generation of System-on-Chip Integration examines the current issues restricting …
The Next Generation of System-on-Chip Integration examines the current issues restricting …
Performance evaluation of application mapping approaches for network-on-chip designs
Network-on-chip (NoC) is evolving as a better substitute for incorporating a large number of
cores on a single system-on-chip (SoC). The dependency on multi-core systems to …
cores on a single system-on-chip (SoC). The dependency on multi-core systems to …
Application specific NoC design
L Benini - Proceedings of the Design Automation & Test in …, 2006 - ieeexplore.ieee.org
Scalable networks on chips (NoCs) are needed to match the ever-increasing communication
demands of large-scale multi-processor systems-on-chip (MPSoCs) for high-end wireless …
demands of large-scale multi-processor systems-on-chip (MPSoCs) for high-end wireless …
Synthesis of networks on chips for 3D systems on chips
Three-dimensional stacking of silicon layers is emerging as a promising solution to handle
the design complexity and heterogeneity of Systems on Chips (SoCs). Networks on Chips …
the design complexity and heterogeneity of Systems on Chips (SoCs). Networks on Chips …