Field programmable gate array applications—A scientometric review
Field Programmable Gate Array (FPGA) is a general purpose programmable logic device
that can be configured by a customer after manufacturing to perform from a simple logic gate …
that can be configured by a customer after manufacturing to perform from a simple logic gate …
Power-efficient sum of absolute differences hardware architecture using adder compressors for integer motion estimation design
Sum of absolute differences (SAD) calculation is one of the most time-consuming operations
of video encoders compatible with the high efficiency video coding standard. SAD hardware …
of video encoders compatible with the high efficiency video coding standard. SAD hardware …
An efficient hardware architecture of integer motion estimation based on early termination and data reuse for Versatile video coding
J Zhang, Y Zhang, H Zhang - Expert Systems with Applications, 2024 - Elsevier
The integer motion estimation (IME) involves high computational complexity and large
amount of computation data due to the variable block sizes, and it is one of the most critical …
amount of computation data due to the variable block sizes, and it is one of the most critical …
An efficient versatile video coding motion estimation hardware
Abstract Versatile Video Coding (VVC) is the latest video coding standard. It provides higher
compression efficiency than the previous video coding standards at the cost of significant …
compression efficiency than the previous video coding standards at the cost of significant …
On the use of deep learning and parallelism techniques to significantly reduce the HEVC intra-coding time
V Galiano, H Migallón, M Martínez-Rach… - The Journal of …, 2023 - Springer
It is well-known that each new video coding standard significantly increases in
computational complexity with respect to previous standards, and this is particularly true for …
computational complexity with respect to previous standards, and this is particularly true for …
Key pose recognition toward sports scene using deeply-learned model
C Zhi-chao, L Zhang - Journal of Visual Communication and Image …, 2019 - Elsevier
Key pose recognition (KPR) is widely used in sport analysis, which provides effective tools
for coaches, athletes and other professionals to conduct game analysis and auxiliary …
for coaches, athletes and other professionals to conduct game analysis and auxiliary …
[HTML][HTML] Real-time motion estimation diamond search algorithm for the new high efficiency video coding on FPGA
High efficiency video coding (HEVC) is the latest video coding standard aimed to replace the
H. 264/AVC standard according to its high coding performance, which allows it to be mostly …
H. 264/AVC standard according to its high coding performance, which allows it to be mostly …
[HTML][HTML] Exploring high-order adder compressors for power reduction in sum of absolute differences architectures for real-time UHD video encoding
The sum of absolute difference (SAD) calculation is one of the most computing-intensive
operations in video encoders compatible with recent standards, such as high-efficiency …
operations in video encoders compatible with recent standards, such as high-efficiency …
Hardware implementation and validation of the fast variable block size motion estimation architecture for HEVC Standard
Abstract High-Efficiency Video Coding (HEVC) has become popular according to its
excellent coding performance, in particular in the case of high-resolution video applications …
excellent coding performance, in particular in the case of high-resolution video applications …
Fast hardware-based ime with an idle cycle and computational redundancy reduction
Extensive efforts have been made to design hardware-based integer motion estimation
(IME) that is much faster than software-based IME but suffers from the degradation in the …
(IME) that is much faster than software-based IME but suffers from the degradation in the …