Recent digital applications will require highly efficient and high-speed gadgets and it is
related to the minimum delay and power consumption. The proposed work deals with a low …

Nowadays, the ASIC design is increasing in complexity, and PPA targets are pushed to the
limit. The lack of physical information at the early design stages hinders precise timing …

This research work focuses on the development of a low-power decode logic for a RISC-V
processor core with specifications. The goal is to create a controller that performs all six …

VLSI Technology is all about creating complex chips and SoCs by packing billions of
transistors into a single chip. Designing these tiny chips containing very complex circuitry …

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With the proliferation of battery-operated systems, reducing power consumption in integrated
circuits is increasingly critical. This paper introduces a comprehensive approach to reducing …

The growing demand for low-power integrated circuits has made power reduction
techniques. Among these techniques, clock gating is an essential method to use in modern …

This paper presents the architecture design, verification, and optimization of a SPI (Serial
Peripheral Interface) Master, based on the specifications stated in SPI-block guide V03. 06 …

The router is designed to manage the efficient routing of data from a single input to one of
three outputs, making it a critical component in various communication systems. The …

This paper presents the architecture design, verification, and optimization of a SPI (Serial
Peripheral Interface) Master, based on the specifications stated in SPI-block guide V03. 06 …