Memory cell with independently-sized electrode

M Ravasio, S Sciarrillo, A Gotti - US Patent 9,257,431, 2016 - Google Patents
BACKGROUND Memory devices are typically provided as internal, semi conductor,
integrated circuits in computers or other electronic devices. There are many different types of …

Three dimensional resistive memory architectures

F Perner, K Rho, JH Kim, S Hwang, J Park… - US Patent …, 2017 - Google Patents
In one example, a three dimensional resistive memory architecture includes adjacent
memory tiles with each tile including a multilevel resistive crossbar array and at least one …

Semiconductor memory device having three-dimensional cross point array

L Zhang, YB Kim, YS Kang, IG Baek, M Terai - US Patent 9,184,218, 2015 - Google Patents
(57) ABSTRACT A semiconductor memory device includes pillars extending upright on a
Substrate in a direction perpendicular to the Substrate, a stack disposed on the Substrate …

Memory cell structures

SE Sills, DVN Ramaswamy - US Patent 9,691,981, 2017 - Google Patents
BACKGROUND Memory devices are typically provided as internal, semi conductor,
integrated circuits in computers or other elec tronic devices. There are many different types …

Memcapacitor devices, field effect transistor devices, non-volatile memory arrays, and methods of programming

RE Meade, GS Sandhu - US Patent 8,437,174, 2013 - Google Patents
US PATENT DOCUMENTS 4,242,736 A 12/1980 Raffel et al. 4.947, 376 A 8, 1990 Arimoto
et al. 5,161,121 A 11, 1992 Cho 5,736,420 A* 4, 1998 Minet al....................... 438/143 …

Methods for forming interconnections between top electrodes in memory cells by a two-step chemical-mechanical polishing (CMP) process

S Sciarrillo - US Patent 9,443,763, 2016 - Google Patents
US9443763B2 - Methods for forming interconnections between top electrodes in memory
cells by a two-step chemical-mechanical polishing (CMP) process - Google Patents …

Capacitive crossbar arrays

DB Strukov, GS Snider, RS Williams - US Patent 8,605,488, 2013 - Google Patents
BACKGROUND A crossbar array includes a set of upper wires and a set of lower wires. The
set of upper wires and lower wires intersect. At each intersection, memory elements are …

Memcapacitor

AM Bratkovski, RS Williams - US Patent 8,750,024, 2014 - Google Patents
BACKGROUND The presence of dopants within an insulating or semicon ducting matrix can
dramatically alter the electrical character istics and behavior of a device which incorporates …

Wear-leveling method for cross-point memory for multiple data temperature zones

X Tang, K Hu, X Lee, Y Wu - US Patent 11,556,462, 2023 - Google Patents
(57) ABSTRACT A method performed by a processor to improve wearleveling in a cross-
point (X3D) memory, comprises detecting, by a processor coupled to the X3D memory, a …

Memory controller for reducing capacitive coupling in a cross-point memory

HA Castro, JM Hirst, E Carman - US Patent 9,123,410, 2015 - Google Patents
The present disclosure relates to a memory controller. The memory controller may include a
memory controller module configured to identify a target word line in response to a memory …