Logic design and simulation of a 128-b AES encryption accelerator based on rapid single-flux-quantum circuits
Y Zhou, GM Tang, JH Yang, PS Yu… - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
A 128-b rapid single-flux-quantum (RSFQ) Advanced Encryption Standard (AES) encryption
accelerator based on bit-slice architecture is proposed for the first time. Unlike the traditional …
accelerator based on bit-slice architecture is proposed for the first time. Unlike the traditional …
Modeling and optimization of the lightweight HIGHT block cipher design with FPGA implementation
BJ Mohd, T Hayajneh, ZA Khalaf… - Security and …, 2016 - Wiley Online Library
The growth of low‐resource devices has increased rapidly in recent years. Communication
in such devices presents two challenges: security and resource limitation. Lightweight …
in such devices presents two challenges: security and resource limitation. Lightweight …
A high performance ST-Box based unified AES encryption/decryption architecture on FPGA
In this paper, a unified Field Programmable Gate Array (FPGA) based Advanced Encryption
Standard (AES) encryptor/decryptor design is presented by proposing a symmetric ST-Box …
Standard (AES) encryptor/decryptor design is presented by proposing a symmetric ST-Box …
A High Throughput and Pipelined Implementation of the LUKS on FPGA
X Li, K Wu, Q Zhang, S Lin, Y Chen… - Journal of Circuits …, 2020 - World Scientific
The Linux Unified Key Setup (LUKS) is the standard key management scheme for the full
disk encryption solution implemented in Linux-based operating systems. It is composed of …
disk encryption solution implemented in Linux-based operating systems. It is composed of …
Resource-Efficient Image Buffer Architecture for Neighborhood Processors
Neighborhood image processing operations on Field Programmable Gate Array (FPGA) are
considered as memory intensive operations. A large memory bandwidth is required to …
considered as memory intensive operations. A large memory bandwidth is required to …
[引用][C] EFFICIENT HARDWARE IMPLEMENTATION OF CRYPTOGRAPHIC PRIMITIVES ON FIELD PROGRAMMABLE GATE ARRAY
DS Kundi - 2016 - repository.pastic.gov.pk
Pastic Digital Repository: EFFICIENT HARDWARE IMPLEMENTATION OF CRYPTOGRAPHIC
PRIMITIVES ON FIELD PROGRAMMABLE GATE ARRAY Skip navigation DSpace logo Home …
PRIMITIVES ON FIELD PROGRAMMABLE GATE ARRAY Skip navigation DSpace logo Home …
[引用][C] A Pipelined Implementation of the Linux Unified Key Setup Authentication Scheme on Field-programmable Gate Array
W YANG, L HUANG, K WU, C CAO, B ZHAO, X LI