Review of performance metrics of spin qubits in gated semiconducting nanostructures
Abstract This Technical Review collects values of selected performance characteristics of
semiconductor spin qubits defined in electrically controlled nanostructures. The …
semiconductor spin qubits defined in electrically controlled nanostructures. The …
Semiconductor quantum computation
Semiconductors, a significant type of material in the information era, are becoming more and
more powerful in the field of quantum information. In recent decades, semiconductor …
more powerful in the field of quantum information. In recent decades, semiconductor …
A review on quantum computing: From qubits to front-end electronics and cryogenic MOSFET physics
Quantum computing (QC) has already entered the industrial landscape and several
multinational corporations have initiated their own research efforts. So far, many of these …
multinational corporations have initiated their own research efforts. So far, many of these …
Quantum computing: fundamentals, implementations and applications
Quantum Computing is a technology, which promises to overcome the drawbacks of
conventional CMOS technology for high density and high performance applications. Its …
conventional CMOS technology for high density and high performance applications. Its …
Impact of classical control electronics on qubit fidelity
Quantum processors rely on classical electronic controllers to manipulate and read out the
state of quantum bits (qubits). As the performance of the quantum processor improves …
state of quantum bits (qubits). As the performance of the quantum processor improves …
[HTML][HTML] Back-gate effects on DC performance and carrier transport in 22 nm FDSOI technology down to cryogenic temperatures
This paper presents an in-depth DC characterization of a 22 nm FDSOI CMOS technology
down to deep cryogenic temperature, ie, 2.95 K. The impact of the back-gate voltage (V …
down to deep cryogenic temperature, ie, 2.95 K. The impact of the back-gate voltage (V …
Role of critical thickness in SiGe/Si/SiGe heterostructure design for qubits
Y Liu, KP Gradwohl, CH Lu, T Remmele… - Journal of Applied …, 2022 - pubs.aip.org
We study the critical thickness for the plastic relaxation of the Si quantum well layer
embedded in a SiGe/Si/SiGe heterostructure for qubits by plan-view transmission electron …
embedded in a SiGe/Si/SiGe heterostructure for qubits by plan-view transmission electron …
Cryogenic characterization of 28-nm FD-SOI ring oscillators with energy efficiency optimization
H Bohuslavskyi, S Barraud, V Barral… - … on Electron Devices, 2018 - ieeexplore.ieee.org
Extensive electrical characterization of ring oscillators (ROs) made in high-κ metal gate 28-
nm fully depleted silicon-on-insulator technology is presented for a set of temperatures …
nm fully depleted silicon-on-insulator technology is presented for a set of temperatures …
Conditional dispersive readout of a CMOS single-electron memory cell
Quantum computers require interfaces with classical electronics for efficient qubit control,
measurement, and fast data processing. Fabricating the qubit and the classical control layer …
measurement, and fast data processing. Fabricating the qubit and the classical control layer …
[HTML][HTML] Electrode-stress-induced nanoscale disorder in Si quantum electronic devices
Disorder in the potential-energy landscape presents a major obstacle to the more rapid
development of semiconductor quantum device technologies. We report a large-magnitude …
development of semiconductor quantum device technologies. We report a large-magnitude …