An analysis of persistent memory use with WHISPER
Emerging non-volatile memory (NVM) technologies promise durability with read and write
latencies comparable to volatile memory (DRAM). We define Persistent Memory (PM) as …
latencies comparable to volatile memory (DRAM). We define Persistent Memory (PM) as …
Performance evaluation of Intel® transactional synchronization extensions for high-performance computing
Intel has recently introduced Intel® Transactional Synchronization Extensions (Intel® TSX)
in the Intel 4th Generation Core™ Processors. With Intel TSX, a processor can dynamically …
in the Intel 4th Generation Core™ Processors. With Intel TSX, a processor can dynamically …
ThyNVM: Enabling software-transparent crash consistency in persistent memory systems
Emerging byte-addressable nonvolatile memories (NVMs) promise persistent memory,
which allows processors to directly access persistent data in main memory. Yet, persistent …
which allows processors to directly access persistent data in main memory. Yet, persistent …
P2C2: Programmable pixel compressive camera for high speed imaging
We describe an imaging architecture for compressive video sensing termed programmable
pixel compressive camera (P2C2). P2C2 allows us to capture fast phenomena at frame rates …
pixel compressive camera (P2C2). P2C2 allows us to capture fast phenomena at frame rates …
NOrec: streamlining STM by abolishing ownership records
Drawing inspiration from several previous projects, we present an ownership-record-free
software transactional memory (STM) system that combines extremely low overhead with …
software transactional memory (STM) system that combines extremely low overhead with …
A type and effect system for deterministic parallel Java
Today's shared-memory parallel programming models are complex and error-prone. While
many parallel programs are intended to be deterministic, unanticipated thread interleavings …
many parallel programs are intended to be deterministic, unanticipated thread interleavings …
Brief announcement: the problem based benchmark suite
This announcement describes the problem based benchmark suite (PBBS). PBBS is a set of
benchmarks designed for comparing parallel algorithmic approaches, parallel programming …
benchmarks designed for comparing parallel algorithmic approaches, parallel programming …
Evaluation of Blue Gene/Q hardware support for transactional memories
This paper describes an end-to-end system implementation of the transactional memory
(TM) programming model on top of the hardware transactional memory (HTM) of the Blue …
(TM) programming model on top of the hardware transactional memory (HTM) of the Blue …
More than you ever wanted to know about synchronization: Synchrobench, measuring the impact of the synchronization on concurrent algorithms
V Gramoli - Proceedings of the 20th ACM SIGPLAN Symposium on …, 2015 - dl.acm.org
In this paper, we present the most extensive comparison of synchronization techniques. We
evaluate 5 different synchronization techniques through a series of 31 data structure …
evaluate 5 different synchronization techniques through a series of 31 data structure …
Stretching transactional memory
A Dragojević, R Guerraoui, M Kapalka - ACM sigplan notices, 2009 - dl.acm.org
Transactional memory (TM) is an appealing abstraction for programming multi-core systems.
Potential target applications for TM, such as business software and video games, are likely …
Potential target applications for TM, such as business software and video games, are likely …