Bulk disambiguation of speculative threads in multiprocessors

L Ceze, J Tuck, J Torrellas, C Cascaval - ACM SIGARCH Computer …, 2006 - dl.acm.org
Transactional Memory (TM), Thread-Level Speculation (TLS), and Checkpointed
multiprocessors are three popular architectural techniques based on the execution of …

POSH: a TLS compiler that exploits program structure

W Liu, J Tuck, L Ceze, W Ahn, K Strauss… - Proceedings of the …, 2006 - dl.acm.org
As multi-core architectures with Thread-Level Speculation (TLS) are becoming better
understood, it is important to focus on TLS compilation. TLS compilers are interesting in that …

A survey on thread-level speculation techniques

A Estebanez, DR Llanos… - ACM Computing Surveys …, 2016 - dl.acm.org
Thread-Level Speculation (TLS) is a promising technique that allows the parallel execution
of sequential code without relying on a prior, compile-time-dependence analysis. In this …

A scalable architecture for ordered parallelism

MC Jeffrey, S Subramanian, C Yan, J Emer… - Proceedings of the 48th …, 2015 - dl.acm.org
We present Swarm, a novel architecture that exploits ordered irregular parallelism, which is
abundant but hard to mine with current software and hardware techniques. In this …

An overview of Prophet

Z Chen, YL Zhao, XY Pan, ZY Dong, B Gao… - … and Architectures for …, 2009 - Springer
Abstract Speculative Multithreading (SpMT) has been proposed as a perspective method to
exploit Chip Multiprocessors (CMP) hardware potential. This paper researches speculative …

A scalable architecture for reprioritizing ordered parallelism

G Posluns, Y Zhu, G Zhang, MC Jeffrey - Proceedings of the 49th Annual …, 2022 - dl.acm.org
Many algorithms schedule their work, or tasks, according to a priority order for correctness or
faster convergence. While priority schedulers commonly implement task enqueue and …

T4: Compiling sequential code for effective speculative parallelization in hardware

VA Ying, MC Jeffrey, D Sanchez - 2020 ACM/IEEE 47th Annual …, 2020 - ieeexplore.ieee.org
Multicores are now ubiquitous, but programmers still write sequential code. Speculative
parallelization is an enticing approach to parallelize code while retaining the ease of …

Implicit parallelism with ordered transactions

C Von Praun, L Ceze, C Caşcaval - … on Principles and practice of parallel …, 2007 - dl.acm.org
Implicit Parallelism with Ordered Transactions (IPOT) is an extension of sequential or
explicitly parallel programming models to support speculative parallelization. The key idea is …

Using predictivemodeling for cross-program design space exploration in multicore systems

S Khan, P Xekalakis, J Cavazos… - … Conference on Parallel …, 2007 - ieeexplore.ieee.org
The vast number of transistors available through modern fabrication technology gives
architects an unprecedented amount of freedom in chip-multiprocessor (CMP) designs …

Data-centric execution of speculative parallel programs

MC Jeffrey, S Subramanian… - 2016 49th Annual …, 2016 - ieeexplore.ieee.org
Multicore systems must exploit locality to scale, scheduling tasks to minimize data
movement. While locality-aware parallelism is well studied in non-speculative systems, it …