CircuitNet 2.0: An Advanced Dataset for Promoting Machine Learning Innovations in Realistic Chip Design Environment

X Jiang, Y Zhao, Y Lin, R Wang… - The Twelfth International …, 2024 - openreview.net
Integrated circuits or chips are key to enable computing in modern industry. Designing a
chip relies on human experts to produce chip data through professional electronic design …

2023 ICCAD CAD Contest Problem C: Static IR Drop Estimation Using Machine Learning

GSP Kadagala, VA Chhabria - 2023 IEEE/ACM International …, 2023 - ieeexplore.ieee.org
Power delivery network (PDN) analysis is a critical aspect of the design cycle to ensure the
power grid meets the current demands of the chip. Static IR drop simulation, performed as a …

IEEE CEDA DATC Emerging Foundations in IC Physical Design and MLCAD Research

J Jung, AB Kahng, S Kundu, Z Wang… - 2023 IEEE/ACM …, 2023 - ieeexplore.ieee.org
Recent activities of the IEEE CEDA DATC strengthen the DATC Robust Design Flow (RDF)
and broadly support research on machine learning for CAD/EDA (MLCAD). The RDF-2023 …

OpenROAD and CircuitOps: Infrastructure for ML EDA Research and Education

VA Chhabria, W Jiang, AB Kahng… - 2024 IEEE 42nd …, 2024 - ieeexplore.ieee.org
Traditional electronic design automation (EDA) techniques struggle to fulfill the stringent
efficiency and quick turnaround demands of complex integrated systems. Machine learning …

Layout Congestion Prediction Based on Regression-ViT

G Mo, Y Xia, J Ou, S Cai, X Xiong - ACM Transactions on Design …, 2024 - dl.acm.org
To accelerate the back-end design flow of integrated circuit (IC), numerous studies have
made exploratory advancements in machine learning (ML) for electronic design automation …

Overview of 2023 CAD Contest at ICCAD

T Sato, CY Wang, YG Chen… - 2023 IEEE/ACM …, 2023 - ieeexplore.ieee.org
The “CAD Contest at ICCAD” is a challenging, multi-month, research and development
competition, focusing on advanced, real-world problems in the field of electronic design …

GAN4IP: A unified GAN and logic locking-based pipeline for hardware IP security

J Gandhi, D Shekhawat, M Santosh, JG Pandey - Sādhanā, 2024 - Springer
Intellectual property (IP) security has emerged as a critical concern in semiconductor
industries. In the domain of hardware IP security, logic locking is a commonly used …

MAUnet: Multiscale Attention U-Net for Effective IR Drop Prediction

M Wang, Y Cheng, Y Lin, K Peng, S Yang… - Proceedings of the 61st …, 2024 - dl.acm.org
The efficient analysis of power grids is a crucial yet computationally challenging task in
integrated circuit (IC) design, given the shrinking power supply voltage of ultra deep …

Circuits Physics Constrained Predictor of Static IR Drop with Limited Data

Y Meng, R Lyu, Z Bi, C Yan, F Yang… - … , Automation & Test …, 2024 - ieeexplore.ieee.org
We propose a pyramid scene parsing network (PSPN) with skip-connection architecture to
effectively utilize physical information that characterizes IR drop distribution, including …

Static IR Drop Prediction with Attention U-Net and Saliency-Based Explainability

L Zhang, A Davoodi - arXiv preprint arXiv:2408.03292, 2024 - arxiv.org
There has been significant recent progress to reduce the computational effort of static IR
drop analysis using neural networks, and modeling as an image-to-image translation task. A …