A 2-bit FinFET flash memory cell capable of storing 2 bits and a method of forming the same
are provided. The memory cell includes a semiconductor fin on a top surface of a substrate …

US7535048B2 - NROM memory cell, memory array, related devices and methods - Google
Patents US7535048B2 - NROM memory cell, memory array, related devices and methods …

A high permittivity tunneling dielectric is used in a flash memory cell to provide greater
tunneling current into the floating gate with smaller gate voltages. The flash memory cell has …

A comparative study of biosensors based on a field effect transistor (FET) configuration is
conducted using numerical analysis. A conventional back-gated device and three different …

Memory devices are typically provided as internal storage areas in the computer. The term
memory identifies data storage that comes in the form of integrated circuit chips. There are …

6,147.904 A 6,157,570 A 6,172,396 B1 6,174,758 B1 6,175,523 B1 6,181,597 B1 6,184,089
B1 6,201,282 B1 6,201,737 B1 6,204,529 B1 6,207,504 B1 6,208,557 B1 6.215, 702 B1 …

A high permittivity gate dielectric is used in an NROM memory cell. The gate dielectric has a
dielectric constant greater than silicon dioxide and is comprised of an atomic layer deposited …

(57) ABSTRACT A extractor implanted region is used in a silicon-on-insulator CMOS
memory device. The extractor region is reversed biased to remove minority carriers from the …

A multi-state NAND memory cell includes two drain/source areas in a substrate. An oxide-
nitride-oxide structure is formed above the substrate between the drain/source areas. The …

A time-dependent analytical method based on effective traps in a modified equivalent oxide
thickness (EOT) model has been proposed for Flash memory studies, which reflects the …